mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-29 07:53:33 +00:00
39ceb471b7
for vectors. Codegen is generating awful code or segfaulting in various cases (e.g. PR6204). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95058 91177308-0d34-0410-b5e6-96231b3b80d8
353 lines
7.7 KiB
LLVM
353 lines
7.7 KiB
LLVM
; This test makes sure that these instructions are properly eliminated.
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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define i32 @test1(i32 %A) {
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%B = or i32 %A, 0
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ret i32 %B
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; CHECK: @test1
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; CHECK: ret i32 %A
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}
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define i32 @test2(i32 %A) {
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%B = or i32 %A, -1
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ret i32 %B
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; CHECK: @test2
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; CHECK: ret i32 -1
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}
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define i8 @test2a(i8 %A) {
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%B = or i8 %A, -1
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ret i8 %B
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; CHECK: @test2a
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; CHECK: ret i8 -1
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}
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define i1 @test3(i1 %A) {
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%B = or i1 %A, false
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ret i1 %B
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; CHECK: @test3
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; CHECK: ret i1 %A
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}
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define i1 @test4(i1 %A) {
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%B = or i1 %A, true
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ret i1 %B
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; CHECK: @test4
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; CHECK: ret i1 true
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}
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define i1 @test5(i1 %A) {
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%B = or i1 %A, %A
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ret i1 %B
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; CHECK: @test5
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; CHECK: ret i1 %A
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}
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define i32 @test6(i32 %A) {
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%B = or i32 %A, %A
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ret i32 %B
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; CHECK: @test6
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; CHECK: ret i32 %A
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}
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; A | ~A == -1
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define i32 @test7(i32 %A) {
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%NotA = xor i32 -1, %A
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%B = or i32 %A, %NotA
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ret i32 %B
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; CHECK: @test7
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; CHECK: ret i32 -1
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}
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define i8 @test8(i8 %A) {
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%B = or i8 %A, -2
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%C = or i8 %B, 1
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ret i8 %C
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; CHECK: @test8
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; CHECK: ret i8 -1
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}
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; Test that (A|c1)|(B|c2) == (A|B)|(c1|c2)
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define i8 @test9(i8 %A, i8 %B) {
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%C = or i8 %A, 1
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%D = or i8 %B, -2
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%E = or i8 %C, %D
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ret i8 %E
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; CHECK: @test9
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; CHECK: ret i8 -1
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}
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define i8 @test10(i8 %A) {
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%B = or i8 %A, 1
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%C = and i8 %B, -2
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; (X & C1) | C2 --> (X | C2) & (C1|C2)
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%D = or i8 %C, -2
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ret i8 %D
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; CHECK: @test10
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; CHECK: ret i8 -2
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}
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define i8 @test11(i8 %A) {
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%B = or i8 %A, -2
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%C = xor i8 %B, 13
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; (X ^ C1) | C2 --> (X | C2) ^ (C1&~C2)
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%D = or i8 %C, 1
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%E = xor i8 %D, 12
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ret i8 %E
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; CHECK: @test11
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; CHECK: ret i8 -1
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}
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define i32 @test12(i32 %A) {
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; Should be eliminated
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%B = or i32 %A, 4
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%C = and i32 %B, 8
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ret i32 %C
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; CHECK: @test12
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; CHECK: %C = and i32 %A, 8
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; CHECK: ret i32 %C
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}
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define i32 @test13(i32 %A) {
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%B = or i32 %A, 12
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; Always equal to 8
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%C = and i32 %B, 8
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ret i32 %C
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; CHECK: @test13
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; CHECK: ret i32 8
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}
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define i1 @test14(i32 %A, i32 %B) {
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%C1 = icmp ult i32 %A, %B
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%C2 = icmp ugt i32 %A, %B
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; (A < B) | (A > B) === A != B
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%D = or i1 %C1, %C2
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ret i1 %D
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; CHECK: @test14
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; CHECK: %D = icmp ne i32 %A, %B
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; CHECK: ret i1 %D
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}
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define i1 @test15(i32 %A, i32 %B) {
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%C1 = icmp ult i32 %A, %B
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%C2 = icmp eq i32 %A, %B
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; (A < B) | (A == B) === A <= B
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%D = or i1 %C1, %C2
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ret i1 %D
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; CHECK: @test15
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; CHECK: %D = icmp ule i32 %A, %B
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; CHECK: ret i1 %D
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}
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define i32 @test16(i32 %A) {
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%B = and i32 %A, 1
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; -2 = ~1
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%C = and i32 %A, -2
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; %D = and int %B, -1 == %B
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%D = or i32 %B, %C
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ret i32 %D
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; CHECK: @test16
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; CHECK: ret i32 %A
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}
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define i32 @test17(i32 %A) {
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%B = and i32 %A, 1
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%C = and i32 %A, 4
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; %D = and int %B, 5
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%D = or i32 %B, %C
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ret i32 %D
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; CHECK: @test17
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; CHECK: %D = and i32 %A, 5
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; CHECK: ret i32 %D
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}
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define i1 @test18(i32 %A) {
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%B = icmp sge i32 %A, 100
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%C = icmp slt i32 %A, 50
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;; (A-50) >u 50
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%D = or i1 %B, %C
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ret i1 %D
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; CHECK: @test18
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; CHECK: add i32
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; CHECK: %D = icmp ugt
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; CHECK: ret i1 %D
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}
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define i1 @test19(i32 %A) {
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%B = icmp eq i32 %A, 50
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%C = icmp eq i32 %A, 51
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;; (A-50) < 2
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%D = or i1 %B, %C
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ret i1 %D
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; CHECK: @test19
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; CHECK: add i32
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; CHECK: %D = icmp ult
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; CHECK: ret i1 %D
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}
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define i32 @test20(i32 %x) {
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%y = and i32 %x, 123
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%z = or i32 %y, %x
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ret i32 %z
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; CHECK: @test20
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; CHECK: ret i32 %x
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}
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define i32 @test21(i32 %tmp.1) {
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%tmp.1.mask1 = add i32 %tmp.1, 2
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%tmp.3 = and i32 %tmp.1.mask1, -2
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%tmp.5 = and i32 %tmp.1, 1
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;; add tmp.1, 2
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%tmp.6 = or i32 %tmp.5, %tmp.3
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ret i32 %tmp.6
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; CHECK: @test21
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; CHECK: add i32 %{{[^,]*}}, 2
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; CHECK: ret i32
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}
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define i32 @test22(i32 %B) {
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%ELIM41 = and i32 %B, 1
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%ELIM7 = and i32 %B, -2
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%ELIM5 = or i32 %ELIM41, %ELIM7
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ret i32 %ELIM5
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; CHECK: @test22
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; CHECK: ret i32 %B
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}
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define i16 @test23(i16 %A) {
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%B = lshr i16 %A, 1
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;; fold or into xor
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%C = or i16 %B, -32768
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%D = xor i16 %C, 8193
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ret i16 %D
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; CHECK: @test23
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; CHECK: %B = lshr i16 %A, 1
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; CHECK: %D = xor i16 %B, -24575
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; CHECK: ret i16 %D
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}
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; PR1738
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define i1 @test24(double %X, double %Y) {
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%tmp9 = fcmp uno double %X, 0.000000e+00 ; <i1> [#uses=1]
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%tmp13 = fcmp uno double %Y, 0.000000e+00 ; <i1> [#uses=1]
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%bothcond = or i1 %tmp13, %tmp9 ; <i1> [#uses=1]
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ret i1 %bothcond
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; CHECK: @test24
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; CHECK: %bothcond = fcmp uno double %Y, %X ; <i1> [#uses=1]
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; CHECK: ret i1 %bothcond
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}
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; PR3266 & PR5276
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define i1 @test25(i32 %A, i32 %B) {
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%C = icmp eq i32 %A, 0
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%D = icmp eq i32 %B, 57
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%E = or i1 %C, %D
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%F = xor i1 %E, -1
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ret i1 %F
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; CHECK: @test25
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; CHECK: icmp ne i32 %A, 0
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; CHECK-NEXT: icmp ne i32 %B, 57
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; CHECK-NEXT: %F = and i1
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; CHECK-NEXT: ret i1 %F
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}
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; PR5634
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define i1 @test26(i32 %A, i32 %B) {
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%C1 = icmp eq i32 %A, 0
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%C2 = icmp eq i32 %B, 0
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; (A == 0) & (A == 0) --> (A|B) == 0
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%D = and i1 %C1, %C2
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ret i1 %D
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; CHECK: @test26
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; CHECK: or i32 %A, %B
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; CHECK: icmp eq i32 {{.*}}, 0
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; CHECK: ret i1
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}
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define i1 @test27(i32* %A, i32* %B) {
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%C1 = ptrtoint i32* %A to i32
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%C2 = ptrtoint i32* %B to i32
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%D = or i32 %C1, %C2
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%E = icmp eq i32 %D, 0
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ret i1 %E
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; CHECK: @test27
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; CHECK: icmp eq i32* %A, null
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; CHECK: icmp eq i32* %B, null
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; CHECK: and i1
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; CHECK: ret i1
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}
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; PR5634
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define i1 @test28(i32 %A, i32 %B) {
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%C1 = icmp ne i32 %A, 0
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%C2 = icmp ne i32 %B, 0
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; (A != 0) | (A != 0) --> (A|B) != 0
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%D = or i1 %C1, %C2
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ret i1 %D
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; CHECK: @test28
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; CHECK: or i32 %A, %B
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; CHECK: icmp ne i32 {{.*}}, 0
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; CHECK: ret i1
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}
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define i1 @test29(i32* %A, i32* %B) {
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%C1 = ptrtoint i32* %A to i32
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%C2 = ptrtoint i32* %B to i32
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%D = or i32 %C1, %C2
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%E = icmp ne i32 %D, 0
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ret i1 %E
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; CHECK: @test29
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; CHECK: icmp ne i32* %A, null
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; CHECK: icmp ne i32* %B, null
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; CHECK: or i1
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; CHECK: ret i1
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}
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; PR4216
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define i32 @test30(i32 %A) {
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entry:
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%B = or i32 %A, 32962
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%C = and i32 %A, -65536
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%D = and i32 %B, 40186
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%E = or i32 %D, %C
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ret i32 %E
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; CHECK: @test30
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; CHECK: %B = or i32 %A, 32962
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; CHECK: %E = and i32 %B, -25350
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; CHECK: ret i32 %E
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}
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; PR4216
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define i64 @test31(i64 %A) nounwind readnone ssp noredzone {
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%B = or i64 %A, 194
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%D = and i64 %B, 250
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%C = or i64 %A, 32768
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%E = and i64 %C, 4294941696
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%F = or i64 %D, %E
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ret i64 %F
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; CHECK: @test31
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; CHECK-NEXT: %bitfield = or i64 %A, 32962
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; CHECK-NEXT: %F = and i64 %bitfield, 4294941946
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; CHECK-NEXT: ret i64 %F
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}
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define <4 x i32> @test32(<4 x i1> %and.i1352, <4 x i32> %vecinit6.i176, <4 x i32> %vecinit6.i191) {
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%and.i135 = sext <4 x i1> %and.i1352 to <4 x i32> ; <<4 x i32>> [#uses=2]
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%and.i129 = and <4 x i32> %vecinit6.i176, %and.i135 ; <<4 x i32>> [#uses=1]
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%neg.i = xor <4 x i32> %and.i135, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1]
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%and.i = and <4 x i32> %vecinit6.i191, %neg.i ; <<4 x i32>> [#uses=1]
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%or.i = or <4 x i32> %and.i, %and.i129 ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %or.i
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; Don't turn this into a vector select until codegen matures to handle them
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; better.
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; CHECK: @test32
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; CHECK: or <4 x i32> %and.i, %and.i129
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}
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