Files
llvm/test/CodeGen
Craig Topper d27d2d709e [X86] Add CodeGenOnly instructions for (f32 (X86selects $mask, (loadf32 addr), fp32imm0) to use masked MOVSS from memory.
Similar for f64 and having a non-zero passthru value.

We were previously not trying to fold the load at all. Using
a CodeGenOnly instruction allows us to use FR32X/FR64X as the
register class to avoid a bunch of COPY_TO_REGCLASS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373021 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-26 22:23:09 +00:00
..
2019-07-04 06:12:47 +00:00
2019-07-30 19:52:01 +00:00