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ec46ea34dc
Remove the hard coded store and load of the link register Implement ARMFrameInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29727 91177308-0d34-0410-b5e6-96231b3b80d8
99 lines
3.0 KiB
C++
99 lines
3.0 KiB
C++
//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "ARMTargetMachine.h"
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#include "ARMFrameInfo.h"
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#include "ARM.h"
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#include "llvm/Assembly/PrintModulePass.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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// Register the target.
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RegisterTarget<ARMTargetMachine> X("arm", " ARM");
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}
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/// TargetMachine ctor - Create an ILP32 architecture model
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///
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ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
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: TargetMachine("ARM"), DataLayout("E-p:32:32"),
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FrameInfo() {
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}
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unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
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return 20;
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if (M.getPointerSize() == Module::Pointer32)
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return 1;
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else
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return 0;
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}
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/// addPassesToEmitFile - Add passes to the specified pass manager
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/// to implement a static compiler for this target.
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///
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bool ARMTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
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CodeGenFileType FileType,
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bool Fast) {
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if (FileType != TargetMachine::AssemblyFile)
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return true;
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// Run loop strength reduction before anything else.
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if (!Fast)
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PM.add(createLoopStrengthReducePass());
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// FIXME: Implement efficient support for garbage collection intrinsics.
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PM.add(createLowerGCPass());
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// FIXME: implement the invoke/unwind instructions!
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PM.add(createLowerInvokePass());
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// Print LLVM code input to instruction selector:
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if (PrintMachineCode)
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PM.add(new PrintFunctionPass());
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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PM.add(createARMISelDag(*this));
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// Print machine instructions as they were initially generated.
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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PM.add(createRegisterAllocator());
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PM.add(createPrologEpilogCodeInserter());
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// Print machine instructions after register allocation and prolog/epilog
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// insertion.
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(&std::cerr));
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// Output assembly language.
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PM.add(createARMCodePrinterPass(Out, *this));
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// Delete the MachineInstrs we generated, since they're no longer needed.
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PM.add(createMachineCodeDeleter());
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return false;
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}
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