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Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252910 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.6 KiB
TableGen
70 lines
2.6 KiB
TableGen
//===- WebAssemblyInstrControl.td-WebAssembly control-flow ------*- tablegen -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief WebAssembly control-flow code-gen constructs.
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///
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//===----------------------------------------------------------------------===//
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/*
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* TODO(jfb): Add the following.
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*
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* block: a fixed-length sequence of statements
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* if: if statement
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* do_while: do while statement, basically a loop with a conditional branch
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* forever: infinite loop statement (like while (1)), basically an unconditional
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* branch (back to the top of the loop)
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* continue: continue to start of nested loop
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* break: break to end from nested loop or block
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* switch: switch statement with fallthrough
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*/
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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def BR_IF_ : I<(outs), (ins bb_op:$dst, I32:$a),
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[(brcond I32:$a, bb:$dst)],
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"br_if $dst, $a">;
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let isBarrier = 1 in {
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def BR : I<(outs), (ins bb_op:$dst),
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[(br bb:$dst)],
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"br $dst">;
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} // isBarrier = 1
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} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
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// TODO: SelectionDAG's lowering insists on using a pointer as the index for
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// jump tables, so in practice we don't ever use SWITCH_I64 in wasm32 mode
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// currently.
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
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[(WebAssemblyswitch I32:$index)],
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"switch $index">;
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def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
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[(WebAssemblyswitch I64:$index)],
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"switch $index">;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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// Placemarkers to indicate the start of a block or loop scope.
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def BLOCK : I<(outs), (ins bb_op:$dst), [], "block $dst">;
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def LOOP : I<(outs), (ins bb_op:$dst), [], "loop $dst">;
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multiclass RETURN<WebAssemblyRegClass vt> {
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def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)],
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"return $val">;
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}
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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let isReturn = 1 in {
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defm : RETURN<I32>;
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defm : RETURN<I64>;
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defm : RETURN<F32>;
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defm : RETURN<F64>;
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def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)], "return">;
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} // isReturn = 1
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def UNREACHABLE : I<(outs), (ins), [(trap)], "unreachable">;
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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