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d39c38d2bc
Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252910 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
2.5 KiB
LLVM
83 lines
2.5 KiB
LLVM
; RUN: llc < %s -asm-verbose=false | FileCheck %s
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; Test that i1 extending loads and truncating stores are assembled properly.
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target datalayout = "e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: load_u_i1_i32:
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; CHECK: i32.load8_u $push, (get_local 0){{$}}
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; CHECK-NEXT: set_local 1, $pop{{$}}
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; CHECK-NEXT: return (get_local 1){{$}}
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define i32 @load_u_i1_i32(i1* %p) {
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%v = load i1, i1* %p
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%e = zext i1 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: load_s_i1_i32:
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; CHECK: i32.load8_u $push, (get_local 0){{$}}
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; CHECK-NEXT: set_local 1, $pop{{$}}
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; CHECK-NEXT: i32.const $push, 31{{$}}
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; CHECK-NEXT: set_local 2, $pop{{$}}
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; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}}
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; CHECK-NEXT: set_local 3, $pop{{$}}
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; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}}
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; CHECK-NEXT: set_local 4, $pop{{$}}
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; CHECK-NEXT: return (get_local 4){{$}}
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define i32 @load_s_i1_i32(i1* %p) {
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%v = load i1, i1* %p
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%e = sext i1 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: load_u_i1_i64:
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; CHECK: i64.load8_u $push, (get_local 0){{$}}
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; CHECK-NEXT: set_local 1, $pop{{$}}
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; CHECK-NEXT: return (get_local 1){{$}}
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define i64 @load_u_i1_i64(i1* %p) {
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%v = load i1, i1* %p
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%e = zext i1 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: load_s_i1_i64:
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; CHECK: i64.load8_u $push, (get_local 0){{$}}
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; CHECK-NEXT: set_local 1, $pop{{$}}
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; CHECK-NEXT: i64.const $push, 63{{$}}
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; CHECK-NEXT: set_local 2, $pop{{$}}
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; CHECK-NEXT: shl $push, (get_local 1), (get_local 2){{$}}
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; CHECK-NEXT: set_local 3, $pop{{$}}
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; CHECK-NEXT: shr_s $push, (get_local 3), (get_local 2){{$}}
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; CHECK-NEXT: set_local 4, $pop{{$}}
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; CHECK-NEXT: return (get_local 4){{$}}
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define i64 @load_s_i1_i64(i1* %p) {
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%v = load i1, i1* %p
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%e = sext i1 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: store_i32_i1:
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; CHECK: i32.const $push, 1{{$}}
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; CHECK-NEXT: set_local 2, $pop{{$}}
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; CHECK-NEXT: i32.and $push, (get_local 1), (get_local 2){{$}}
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; CHECK-NEXT: set_local 3, $pop{{$}}
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; CHECK-NEXT: i32.store8 (get_local 0), (get_local 3){{$}}
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define void @store_i32_i1(i1* %p, i32 %v) {
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%t = trunc i32 %v to i1
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store i1 %t, i1* %p
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ret void
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}
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; CHECK-LABEL: store_i64_i1:
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; CHECK: i64.const $push, 1{{$}}
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; CHECK-NEXT: set_local 2, $pop{{$}}
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; CHECK-NEXT: i64.and $push, (get_local 1), (get_local 2){{$}}
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; CHECK-NEXT: set_local 3, $pop{{$}}
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; CHECK-NEXT: i64.store8 (get_local 0), (get_local 3){{$}}
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define void @store_i64_i1(i1* %p, i64 %v) {
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%t = trunc i64 %v to i1
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store i1 %t, i1* %p
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ret void
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}
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