Sanjay Patel 9317048f2d [InstCombine] fold fneg disguised as select+fmul (PR43497) ...

Extends rL373230 and solves the motivating bug (although in a narrow way):
https://bugs.llvm.org/show_bug.cgi?id=43497

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373851 91177308-0d34-0410-b5e6-96231b3b80d8

2019-10-06 14:15:48 +00:00

..

AggressiveInstCombine

[PatternMatch] Make m_Br more flexible, add matchers for BB values.

2019-09-25 15:05:08 +00:00

Coroutines

[Alignment][NFC] Remove AllocaInst::setAlignment(unsigned)

2019-09-30 13:34:44 +00:00

Hello

Update the file headers across all of the LLVM projects in the monorepo

2019-01-19 08:50:56 +00:00

InstCombine

[InstCombine] fold fneg disguised as select+fmul (PR43497)

2019-10-06 14:15:48 +00:00

Instrumentation

[PGO] Refactor Value Profiling into a plugin based oracle and create a well defined API for the plugins.

2019-10-03 14:20:50 +00:00

IPO

Invalidate assumption cache before outlining.

2019-10-04 22:46:42 +00:00

ObjCARC

[ObjC][ARC] Skip debug instructions when computing the insert point of

2019-09-19 20:58:51 +00:00

Scalar

[MemorySSA] Don't hoist stores if interfering uses (as calls) exist.

2019-10-03 22:20:04 +00:00

Utils

Invalidate assumption cache before outlining.

2019-10-04 22:46:42 +00:00

Vectorize

[SLP] avoid reduction transform on patterns that the backend can load-combine

2019-10-05 18:03:58 +00:00

CMakeLists.txt

Another try to commit 323321 (aggressive instruction combine).

2018-01-25 12:06:32 +00:00

LLVMBuild.txt

Update the file headers across all of the LLVM projects in the monorepo

2019-01-19 08:50:56 +00:00