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This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
211 lines
5.8 KiB
LLVM
211 lines
5.8 KiB
LLVM
; RUN: opt < %s -S -indvars -loop-unroll -verify-loop-info | FileCheck %s
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;
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; Unit tests for loop unrolling using ScalarEvolution to compute trip counts.
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;
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; Indvars is run first to generate an "old" SCEV result. Some unit
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; tests may check that SCEV is properly invalidated between passes.
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; Completely unroll loops without a canonical IV.
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;
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; CHECK-LABEL: @sansCanonical(
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; CHECK-NOT: phi
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; CHECK-NOT: icmp
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; CHECK: ret
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define i32 @sansCanonical(i32* %base) nounwind {
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entry:
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br label %while.body
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while.body:
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%iv = phi i64 [ 10, %entry ], [ %iv.next, %while.body ]
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%sum = phi i32 [ 0, %entry ], [ %sum.next, %while.body ]
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%iv.next = add i64 %iv, -1
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%adr = getelementptr inbounds i32* %base, i64 %iv.next
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%tmp = load i32* %adr, align 8
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%sum.next = add i32 %sum, %tmp
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%iv.narrow = trunc i64 %iv.next to i32
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%cmp.i65 = icmp sgt i32 %iv.narrow, 0
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br i1 %cmp.i65, label %while.body, label %exit
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exit:
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ret i32 %sum
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}
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; SCEV unrolling properly handles loops with multiple exits. In this
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; case, the computed trip count based on a canonical IV is *not* for a
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; latch block. Canonical unrolling incorrectly unrolls it, but SCEV
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; unrolling does not.
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;
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; CHECK-LABEL: @earlyLoopTest(
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; CHECK: tail:
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; CHECK-NOT: br
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; CHECK: br i1 %cmp2, label %loop, label %exit2
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define i64 @earlyLoopTest(i64* %base) nounwind {
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %inc, %tail ]
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%s = phi i64 [ 0, %entry ], [ %s.next, %tail ]
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%adr = getelementptr i64* %base, i64 %iv
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%val = load i64* %adr
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%s.next = add i64 %s, %val
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%inc = add i64 %iv, 1
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%cmp = icmp ne i64 %inc, 4
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br i1 %cmp, label %tail, label %exit1
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tail:
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%cmp2 = icmp ne i64 %val, 0
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br i1 %cmp2, label %loop, label %exit2
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exit1:
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ret i64 %s
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exit2:
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ret i64 %s.next
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}
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; SCEV properly unrolls multi-exit loops.
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;
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; SCEV cannot currently unroll this loop.
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; It should ideally detect a trip count of 5.
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; rdar:14038809 [SCEV]: Optimize trip count computation for multi-exit loops.
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; CHECK-LABEL: @multiExit(
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; CHECKFIXME: getelementptr i32* %base, i32 10
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; CHECKFIXME-NEXT: load i32*
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; CHECKFIXME: br i1 false, label %l2.10, label %exit1
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; CHECKFIXME: l2.10:
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; CHECKFIXME-NOT: br
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; CHECKFIXME: ret i32
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define i32 @multiExit(i32* %base) nounwind {
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entry:
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br label %l1
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l1:
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%iv1 = phi i32 [ 0, %entry ], [ %inc1, %l2 ]
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%iv2 = phi i32 [ 0, %entry ], [ %inc2, %l2 ]
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%inc1 = add i32 %iv1, 1
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%inc2 = add i32 %iv2, 1
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%adr = getelementptr i32* %base, i32 %iv1
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%val = load i32* %adr
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%cmp1 = icmp slt i32 %iv1, 5
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br i1 %cmp1, label %l2, label %exit1
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l2:
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%cmp2 = icmp slt i32 %iv2, 10
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br i1 %cmp2, label %l1, label %exit2
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exit1:
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ret i32 1
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exit2:
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ret i32 %val
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}
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; SCEV should not unroll a multi-exit loops unless the latch block has
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; a known trip count, regardless of the early exit trip counts. The
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; LoopUnroll utility uses this assumption to optimize the latch
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; block's branch.
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;
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; CHECK-LABEL: @multiExitIncomplete(
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; CHECK: l3:
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; CHECK-NOT: br
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; CHECK: br i1 %cmp3, label %l1, label %exit3
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define i32 @multiExitIncomplete(i32* %base) nounwind {
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entry:
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br label %l1
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l1:
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%iv1 = phi i32 [ 0, %entry ], [ %inc1, %l3 ]
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%iv2 = phi i32 [ 0, %entry ], [ %inc2, %l3 ]
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%inc1 = add i32 %iv1, 1
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%inc2 = add i32 %iv2, 1
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%adr = getelementptr i32* %base, i32 %iv1
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%val = load i32* %adr
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%cmp1 = icmp slt i32 %iv1, 5
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br i1 %cmp1, label %l2, label %exit1
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l2:
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%cmp2 = icmp slt i32 %iv2, 10
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br i1 %cmp2, label %l3, label %exit2
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l3:
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%cmp3 = icmp ne i32 %val, 0
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br i1 %cmp3, label %l1, label %exit3
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exit1:
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ret i32 1
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exit2:
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ret i32 2
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exit3:
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ret i32 3
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}
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; When loop unroll merges a loop exit with one of its parent loop's
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; exits, SCEV must forget its ExitNotTaken info.
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;
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; CHECK-LABEL: @nestedUnroll(
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; CHECK-NOT: br i1
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; CHECK: for.body87:
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define void @nestedUnroll() nounwind {
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entry:
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br label %for.inc
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for.inc:
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br i1 false, label %for.inc, label %for.body38.preheader
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for.body38.preheader:
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br label %for.body38
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for.body38:
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%i.113 = phi i32 [ %inc76, %for.inc74 ], [ 0, %for.body38.preheader ]
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%mul48 = mul nsw i32 %i.113, 6
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br label %for.body43
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for.body43:
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%j.011 = phi i32 [ 0, %for.body38 ], [ %inc72, %for.body43 ]
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%add49 = add nsw i32 %j.011, %mul48
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%sh_prom50 = zext i32 %add49 to i64
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%inc72 = add nsw i32 %j.011, 1
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br i1 false, label %for.body43, label %for.inc74
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for.inc74:
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%inc76 = add nsw i32 %i.113, 1
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br i1 false, label %for.body38, label %for.body87.preheader
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for.body87.preheader:
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br label %for.body87
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for.body87:
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br label %for.body87
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}
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; PR16130: clang produces incorrect code with loop/expression at -O2
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; rdar:14036816 loop-unroll makes assumptions about undefined behavior
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;
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; The loop latch is assumed to exit after the first iteration because
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; of the induction variable's NSW flag. However, the loop latch's
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; equality test is skipped and the loop exits after the second
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; iteration via the early exit. So loop unrolling cannot assume that
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; the loop latch's exit count of zero is an upper bound on the number
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; of iterations.
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;
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; CHECK-LABEL: @nsw_latch(
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; CHECK: for.body:
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; CHECK: %b.03 = phi i32 [ 0, %entry ], [ %add, %for.cond ]
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; CHECK: return:
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; CHECK: %b.03.lcssa = phi i32 [ %b.03, %for.body ], [ %b.03, %for.cond ]
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define void @nsw_latch(i32* %a) nounwind {
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entry:
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br label %for.body
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for.body: ; preds = %for.cond, %entry
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%b.03 = phi i32 [ 0, %entry ], [ %add, %for.cond ]
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%tobool = icmp eq i32 %b.03, 0
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%add = add nsw i32 %b.03, 8
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br i1 %tobool, label %for.cond, label %return
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for.cond: ; preds = %for.body
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%cmp = icmp eq i32 %add, 13
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br i1 %cmp, label %return, label %for.body
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return: ; preds = %for.body, %for.cond
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%b.03.lcssa = phi i32 [ %b.03, %for.body ], [ %b.03, %for.cond ]
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%retval.0 = phi i32 [ 1, %for.body ], [ 0, %for.cond ]
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store i32 %b.03.lcssa, i32* %a, align 4
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ret void
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}
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