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596516bef8
Adds the different broadcast instructions to the ReplaceableInstrsAVX2 table. That way the ExeDepsFix pass can take better decisions when AVX2 broadcasts are across domain (int <-> float). In particular, prior to this patch we were generating: vpbroadcastd LCPI1_0(%rip), %ymm2 vpand %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 ## <- domain change penalty Now, we generate the following nice sequence where everything is in the float domain: vbroadcastss LCPI1_0(%rip), %ymm2 vandps %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 <rdar://problem/16354675> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204770 91177308-0d34-0410-b5e6-96231b3b80d8
129 lines
5.2 KiB
LLVM
129 lines
5.2 KiB
LLVM
; RUN: llc -O3 -mtriple=x86_64-apple-macosx -o - < %s -mattr=+avx2 -enable-unsafe-fp-math -mcpu=core2 | FileCheck %s
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; Check that the ExeDepsFix pass correctly fixes the domain for broadcast instructions.
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; <rdar://problem/16354675>
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; CHECK-LABEL: ExeDepsFix_broadcastss
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <4 x float> @ExeDepsFix_broadcastss(<4 x float> %arg, <4 x float> %arg2) {
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%bitcast = bitcast <4 x float> %arg to <4 x i32>
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%and = and <4 x i32> %bitcast, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%floatcast = bitcast <4 x i32> %and to <4 x float>
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%max_is_x = fcmp oge <4 x float> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x float> %floatcast, <4 x float> %arg2
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ret <4 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss256
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <8 x float> @ExeDepsFix_broadcastss256(<8 x float> %arg, <8 x float> %arg2) {
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%bitcast = bitcast <8 x float> %arg to <8 x i32>
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%and = and <8 x i32> %bitcast, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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%floatcast = bitcast <8 x i32> %and to <8 x float>
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%max_is_x = fcmp oge <8 x float> %floatcast, %arg2
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%max = select <8 x i1> %max_is_x, <8 x float> %floatcast, <8 x float> %arg2
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ret <8 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss_inreg
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <4 x float> @ExeDepsFix_broadcastss_inreg(<4 x float> %arg, <4 x float> %arg2, i32 %broadcastvalue) {
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%bitcast = bitcast <4 x float> %arg to <4 x i32>
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%in = insertelement <4 x i32> undef, i32 %broadcastvalue, i32 0
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%mask = shufflevector <4 x i32> %in, <4 x i32> undef, <4 x i32> zeroinitializer
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%and = and <4 x i32> %bitcast, %mask
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%floatcast = bitcast <4 x i32> %and to <4 x float>
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%max_is_x = fcmp oge <4 x float> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x float> %floatcast, <4 x float> %arg2
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ret <4 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastss256_inreg
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; CHECK: broadcastss
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; CHECK: vandps
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; CHECK: vmaxps
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; CHECK: ret
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define <8 x float> @ExeDepsFix_broadcastss256_inreg(<8 x float> %arg, <8 x float> %arg2, i32 %broadcastvalue) {
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%bitcast = bitcast <8 x float> %arg to <8 x i32>
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%in = insertelement <8 x i32> undef, i32 %broadcastvalue, i32 0
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%mask = shufflevector <8 x i32> %in, <8 x i32> undef, <8 x i32> zeroinitializer
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%and = and <8 x i32> %bitcast, %mask
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%floatcast = bitcast <8 x i32> %and to <8 x float>
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%max_is_x = fcmp oge <8 x float> %floatcast, %arg2
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%max = select <8 x i1> %max_is_x, <8 x float> %floatcast, <8 x float> %arg2
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ret <8 x float> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd
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; In that case the broadcast is directly folded into vandpd.
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK:ret
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define <2 x double> @ExeDepsFix_broadcastsd(<2 x double> %arg, <2 x double> %arg2) {
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%bitcast = bitcast <2 x double> %arg to <2 x i64>
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%and = and <2 x i64> %bitcast, <i64 2147483647, i64 2147483647>
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%floatcast = bitcast <2 x i64> %and to <2 x double>
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%max_is_x = fcmp oge <2 x double> %floatcast, %arg2
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%max = select <2 x i1> %max_is_x, <2 x double> %floatcast, <2 x double> %arg2
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ret <2 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd256
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; CHECK: broadcastsd
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK: ret
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define <4 x double> @ExeDepsFix_broadcastsd256(<4 x double> %arg, <4 x double> %arg2) {
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%bitcast = bitcast <4 x double> %arg to <4 x i64>
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%and = and <4 x i64> %bitcast, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>
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%floatcast = bitcast <4 x i64> %and to <4 x double>
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%max_is_x = fcmp oge <4 x double> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x double> %floatcast, <4 x double> %arg2
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ret <4 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd_inreg
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; ExeDepsFix works top down, thus it coalesces vmovlhps domain with
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; vandps and there is nothing more you can do to match vmaxpd.
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; CHECK: vmovlhps
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; CHECK: vandps
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; CHECK: vmaxpd
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; CHECK: ret
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define <2 x double> @ExeDepsFix_broadcastsd_inreg(<2 x double> %arg, <2 x double> %arg2, i64 %broadcastvalue) {
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%bitcast = bitcast <2 x double> %arg to <2 x i64>
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%in = insertelement <2 x i64> undef, i64 %broadcastvalue, i32 0
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%mask = shufflevector <2 x i64> %in, <2 x i64> undef, <2 x i32> zeroinitializer
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%and = and <2 x i64> %bitcast, %mask
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%floatcast = bitcast <2 x i64> %and to <2 x double>
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%max_is_x = fcmp oge <2 x double> %floatcast, %arg2
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%max = select <2 x i1> %max_is_x, <2 x double> %floatcast, <2 x double> %arg2
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ret <2 x double> %max
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}
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; CHECK-LABEL: ExeDepsFix_broadcastsd256_inreg
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; CHECK: broadcastsd
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; CHECK: vandpd
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; CHECK: vmaxpd
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; CHECK: ret
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define <4 x double> @ExeDepsFix_broadcastsd256_inreg(<4 x double> %arg, <4 x double> %arg2, i64 %broadcastvalue) {
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%bitcast = bitcast <4 x double> %arg to <4 x i64>
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%in = insertelement <4 x i64> undef, i64 %broadcastvalue, i32 0
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%mask = shufflevector <4 x i64> %in, <4 x i64> undef, <4 x i32> zeroinitializer
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%and = and <4 x i64> %bitcast, %mask
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%floatcast = bitcast <4 x i64> %and to <4 x double>
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%max_is_x = fcmp oge <4 x double> %floatcast, %arg2
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%max = select <4 x i1> %max_is_x, <4 x double> %floatcast, <4 x double> %arg2
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ret <4 x double> %max
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}
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