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d615ded96e
when the dag combiner simplifies an and mask, notice this and allow those bits to be missing from the zap mask. This compiles Alpha/zapnot4.ll into: sll $16,3,$0 zapnot $0,3,$0 ret $31,($26),1 instead of: ldah $0,1($31) lda $0,-8($0) sll $16,3,$1 and $1,$0,$0 ret $31,($26),1 It would be *really* nice to replace the hunk of code in the AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into (SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking at alpha. Make andrew will do this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30875 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
.cvsignore | ||
Alpha.h | ||
Alpha.td | ||
AlphaAsmPrinter.cpp | ||
AlphaCodeEmitter.cpp | ||
AlphaInstrFormats.td | ||
AlphaInstrInfo.cpp | ||
AlphaInstrInfo.h | ||
AlphaInstrInfo.td | ||
AlphaISelDAGToDAG.cpp | ||
AlphaISelLowering.cpp | ||
AlphaISelLowering.h | ||
AlphaJITInfo.cpp | ||
AlphaJITInfo.h | ||
AlphaLLRP.cpp | ||
AlphaRegisterInfo.cpp | ||
AlphaRegisterInfo.h | ||
AlphaRegisterInfo.td | ||
AlphaRelocations.h | ||
AlphaSchedule.td | ||
AlphaSubtarget.cpp | ||
AlphaSubtarget.h | ||
AlphaTargetAsmInfo.cpp | ||
AlphaTargetAsmInfo.h | ||
AlphaTargetMachine.cpp | ||
AlphaTargetMachine.h | ||
Makefile | ||
README.txt |
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Fix Ordered/Unordered FP stuff