llvm/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
Evan Cheng 2c33915628 Cmp peephole optimization isn't always safe for signed arithmetics.
int tries = INT_MAX;    
while (tries > 0) {
      tries--;
}

The check should be:
        subs    r4, #1
        cmp     r4, #0
        bgt     LBB0_1

The subs can set the overflow V bit when r4 is INT_MAX+1 (which loop
canonicalization apparently does in this case). cmp #0 would have cleared
it while not changing the N and Z bits. Since BGT is dependent on the V
bit, i.e. (N == V) && !Z, it is not safe to eliminate the cmp #0.

rdar://9172742


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23 22:52:04 +00:00

42 lines
1.1 KiB
LLVM

; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 | FileCheck %s
; subs r4, #1
; cmp r4, 0
; bgt
; cmp cannot be optimized away since it will clear the overflow bit.
; gt / ge, lt, le conditions all depend on V bit.
; rdar://9172742
define i32 @t() nounwind {
; CHECK: t:
entry:
br label %bb2
bb: ; preds = %bb2
%0 = tail call i32 @rand() nounwind
%1 = icmp eq i32 %0, 50
br i1 %1, label %bb3, label %bb1
bb1: ; preds = %bb
%tmp = tail call i32 @puts() nounwind
%indvar.next = add i32 %indvar, 1
br label %bb2
bb2: ; preds = %bb1, %entry
; CHECK: bb2
; CHECK: subs [[REG:r[0-9]+]], #1
; CHECK: cmp [[REG]], #0
; CHECK: bgt
%indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
%tries.0 = sub i32 2147483647, %indvar
%tmp1 = icmp sgt i32 %tries.0, 0
br i1 %tmp1, label %bb, label %bb3
bb3: ; preds = %bb2, %bb
ret i32 0
}
declare i32 @rand()
declare i32 @puts() nounwind