Rafael Espindola 6af60ebd57 Relax these tests a bit. ...

It is not relevant where in the string table the name is located.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238053 91177308-0d34-0410-b5e6-96231b3b80d8

2015-05-22 21:37:13 +00:00

..

AArch64

AArch64: add BFC alias for the BFI/BFM instructions.

2015-04-30 18:28:58 +00:00

ARM

[ARM] Fix typo in subtarget feature list for 7em triple

2015-05-22 14:16:22 +00:00

AsmParser

Relax these tests a bit.

2015-05-22 21:37:13 +00:00

COFF

Don't omit the constant when computing a cross-section relative relocation.

2015-05-14 01:10:41 +00:00

Disassembler

[PPC64] Add support for clrbhrb, mfbhrbe, rfebb.

2015-05-22 16:44:10 +00:00

ELF

Relax these tests a bit.

2015-05-22 21:37:13 +00:00

Hexagon

Expand MUX instructions early on Hexagon

2015-03-31 13:35:12 +00:00

MachO

AArch64: work around ld64 bug more aggressively.

2015-05-18 22:07:20 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

Relax these tests a bit.

2015-05-22 21:37:13 +00:00

PowerPC

[PPC64] Add support for clrbhrb, mfbhrbe, rfebb.

2015-05-22 16:44:10 +00:00

R600

R600/SI: Add missing -mcpu=SI to assembler test

2015-04-23 19:33:55 +00:00

Sparc

Sparc: support the "set" synthetic instruction.

2015-05-18 16:43:33 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set

2015-05-18 06:42:57 +00:00