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12f33da20b
On AArch64 the pseudo instruction ldr <reg>, =... supports both 32-bit and 64-bit constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully. Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers. Patch by Janne Grunau! Differential Revision: http://reviews.llvm.org/D4279 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213387 91177308-0d34-0410-b5e6-96231b3b80d8
320 lines
6.7 KiB
ArmAsm
320 lines
6.7 KiB
ArmAsm
//RUN: llvm-mc -triple=aarch64-linux-gnu %s | FileCheck %s
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//
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// Check that large constants are converted to ldr from constant pool
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//
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// simple test
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.section a, "ax", @progbits
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// CHECK-LABEL: f1:
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f1:
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ldr x0, =0x1234
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// CHECK: movz x0, #0x1234
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ldr w1, =0x4567
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// CHECK: movz w1, #0x4567
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ldr x0, =0x12340000
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// CHECK: movz x0, #0x1234, lsl #16
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ldr w1, =0x45670000
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// CHECK: movz w1, #0x4567, lsl #16
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ldr x0, =0xabc00000000
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// CHECK: movz x0, #0xabc, lsl #32
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ldr x0, =0xbeef000000000000
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// CHECK: movz x0, #0xbeef, lsl #48
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.section b,"ax",@progbits
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// CHECK-LABEL: f3:
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f3:
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ldr w0, =0x10001
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// CHECK: ldr w0, .Ltmp[[TMP0:[0-9]+]]
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// loading multiple constants
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.section c,"ax",@progbits
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// CHECK-LABEL: f4:
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f4:
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ldr w0, =0x10002
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// CHECK: ldr w0, .Ltmp[[TMP1:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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ldr w0, =0x10003
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// CHECK: ldr w0, .Ltmp[[TMP2:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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// TODO: the same constants should have the same constant pool location
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.section d,"ax",@progbits
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// CHECK-LABEL: f5:
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f5:
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ldr w0, =0x10004
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// CHECK: ldr w0, .Ltmp[[TMP3:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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ldr w0, =0x10004
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// CHECK: ldr w0, .Ltmp[[TMP4:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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// a section defined in multiple pieces should be merged and use a single constant pool
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.section e,"ax",@progbits
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// CHECK-LABEL: f6:
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f6:
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ldr w0, =0x10006
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// CHECK: ldr w0, .Ltmp[[TMP5:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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.section f, "ax", @progbits
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// CHECK-LABEL: f7:
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f7:
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adds x0, x0, #1
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adds x0, x0, #1
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adds x0, x0, #1
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.section e, "ax", @progbits
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// CHECK-LABEL: f8:
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f8:
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adds x0, x0, #1
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ldr w0, =0x10007
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// CHECK: ldr w0, .Ltmp[[TMP6:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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//
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// Check that symbols can be loaded using ldr pseudo
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//
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// load an undefined symbol
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.section g,"ax",@progbits
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// CHECK-LABEL: f9:
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f9:
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ldr w0, =foo
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// CHECK: ldr w0, .Ltmp[[TMP7:[0-9]+]]
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// load a symbol from another section
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.section h,"ax",@progbits
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// CHECK-LABEL: f10:
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f10:
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ldr w0, =f5
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// CHECK: ldr w0, .Ltmp[[TMP8:[0-9]+]]
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// load a symbol from the same section
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.section i,"ax",@progbits
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// CHECK-LABEL: f11:
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f11:
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ldr w0, =f12
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// CHECK: ldr w0, .Ltmp[[TMP9:[0-9]+]]
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ldr w0,=0x3C000
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// CHECK: ldr w0, .Ltmp[[TMP10:[0-9]+]]
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// CHECK-LABEL: f12:
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f12:
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adds x0, x0, #1
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adds x0, x0, #1
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.section j,"ax",@progbits
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// mix of symbols and constants
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// CHECK-LABEL: f13:
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f13:
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adds x0, x0, #1
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adds x0, x0, #1
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ldr w0, =0x101
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// CHECK: movz w0, #0x101
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adds x0, x0, #1
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adds x0, x0, #1
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ldr w0, =bar
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// CHECK: ldr w0, .Ltmp[[TMP11:[0-9]+]]
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adds x0, x0, #1
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adds x0, x0, #1
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//
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// Check for correct usage in other contexts
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//
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// usage in macro
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.macro useit_in_a_macro
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ldr w0, =0x10008
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ldr w0, =baz
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.endm
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.section k,"ax",@progbits
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// CHECK-LABEL: f14:
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f14:
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useit_in_a_macro
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// CHECK: ldr w0, .Ltmp[[TMP12:[0-9]+]]
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// CHECK: ldr w0, .Ltmp[[TMP13:[0-9]+]]
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// usage with expressions
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.section l, "ax", @progbits
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// CHECK-LABEL: f15:
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f15:
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ldr w0, =0x10001+8
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// CHECK: ldr w0, .Ltmp[[TMP14:[0-9]+]]
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adds x0, x0, #1
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ldr w0, =bar+4
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// CHECK: ldr w0, .Ltmp[[TMP15:[0-9]+]]
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adds x0, x0, #1
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// usage with 64-bit regs
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.section m, "ax", @progbits
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// CHECK-LABEL: f16:
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f16:
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ldr x0, =0x0102030405060708
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// CHECK: ldr x0, .Ltmp[[TMP16:[0-9]+]]
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add x0, x0, #1
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ldr w0, =bar
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// CHECK: ldr w0, .Ltmp[[TMP17:[0-9]+]]
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ldr x0, =bar+16
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// CHECK: ldr x0, .Ltmp[[TMP18:[0-9]+]]
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add x0, x0, #1
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ldr x0, =0x100000001
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// CHECK: ldr x0, .Ltmp[[TMP19:[0-9]+]]
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ldr x1, =-0x80000001
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// CHECK: ldr x1, .Ltmp[[TMP20:[0-9]+]]
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ldr x2, =0x10001
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// CHECK: ldr x2, .Ltmp[[TMP21:[0-9]+]]
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// check range for 32-bit regs
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.section n, "ax", @progbits
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// CHECK-LABEL: f17:
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f17:
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ldr w0, =0xFFFFFFFF
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// CHECK: ldr w0, .Ltmp[[TMP22:[0-9]+]]
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add w0, w0, #1
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ldr w1, =-0x7FFFFFFF
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// CHECK: ldr w1, .Ltmp[[TMP23:[0-9]+]]
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add w0, w0, #1
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ldr w0, =-1
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// CHECK: ldr w0, .Ltmp[[TMP24:[0-9]+]]
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add w0, w0, #1
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// make sure the same contant uses different pools for 32- and 64-bit registers
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.section o, "ax", @progbits
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// CHECK-LABEL: f18:
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f18:
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ldr w0, =0x320064
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// CHECK: ldr w0, .Ltmp[[TMP25:[0-9]+]]
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add w0, w0, #1
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ldr x1, =0x320064
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// CHECK: ldr x1, .Ltmp[[TMP26:[0-9]+]]
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//
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// Constant Pools
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//
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// CHECK: .section b,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP0]]
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// CHECK: .word 65537
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// CHECK: .section c,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP1]]
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// CHECK: .word 65538
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP2]]
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// CHECK: .word 65539
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// CHECK: .section d,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP3]]
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// CHECK: .word 65540
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP4]]
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// CHECK: .word 65540
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// CHECK: .section e,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP5]]
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// CHECK: .word 65542
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP6]]
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// CHECK: .word 65543
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// Should not switch to section because it has no constant pool
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// CHECK-NOT: .section f,"ax",@progbits
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// CHECK: .section g,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP7]]
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// CHECK: .word foo
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// CHECK: .section h,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP8]]
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// CHECK: .word f5
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// CHECK: .section i,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP9]]
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// CHECK: .word f12
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP10]]
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// CHECK: .word 245760
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// CHECK: .section j,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP11]]
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// CHECK: .word bar
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// CHECK: .section k,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP12]]
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// CHECK: .word 65544
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP13]]
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// CHECK: .word baz
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// CHECK: .section l,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP14]]
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// CHECK: .word 65545
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP15]]
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// CHECK: .word bar+4
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// CHECK: .section m,"ax",@progbits
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP16]]
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// CHECK: .xword 72623859790382856
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP17]]
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// CHECK: .word bar
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP18]]
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// CHECK: .xword bar+16
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP19]]
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// CHECK: .xword 4294967297
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP20]]
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// CHECK: .xword -2147483649
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP21]]
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// CHECK: .xword 65537
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// CHECK: .section n,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP22]]
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// CHECK: .word 4294967295
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP23]]
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// CHECK: .word -2147483647
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP24]]
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// CHECK: .word -1
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// CHECK: .section o,"ax",@progbits
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// CHECK: .align 2
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// CHECK: .Ltmp[[TMP25]]
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// CHECK: .word 3276900
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// CHECK: .align 3
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// CHECK: .Ltmp[[TMP26]]
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// CHECK: .xword 3276900
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