Craig Topper 2b8042c2ab [TargetLowering] Rename DAGCombinerInfo::isAfterLegalizeVectorOps to DAGCombiner::isAfterLegalizeDAG since that's what it checks. NFC ...

The code checks Level == AfterLegalizeDAG which is the fourth and last of the possible DAG combine stages that we have.

There is a Level called AfterLegalVectorOps, but that's the third DAG combine and it doesn't always run.

A function called isAfterLegalVectorOps should imply it returns true in either of the DAG combines that runs after the legalize vector ops stage, but that's not what this function does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326832 91177308-0d34-0410-b5e6-96231b3b80d8

2018-03-06 19:44:52 +00:00

..

AsmParser

[AMDGPU][MC] Added lds support for MUBUF instructions

2018-02-21 13:13:48 +00:00

Disassembler

[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier

2018-02-05 14:18:53 +00:00

InstPrinter

[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32

2018-01-15 18:49:15 +00:00

MCTargetDesc

AMDGPU: Remove unused private member of AMDGPUTargetELFStreamer

2018-02-16 23:04:11 +00:00

TargetInfo

Add backend name to Target to enable runtime info to be fed back into TableGen

2017-11-15 23:55:44 +00:00

Utils

[AMDGPU] Add default ISA version targets

2018-03-06 18:33:55 +00:00

AMDGPU.h

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

AMDGPU.td

AMDGPU: Add fast fmaf feature to gfx702

2018-02-27 21:46:15 +00:00

AMDGPUAliasAnalysis.cpp

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

AMDGPUAliasAnalysis.h

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-08 23:53:55 +00:00

AMDGPUAlwaysInlinePass.cpp

AMDGPU: Add option to stress calls

2017-09-21 07:00:48 +00:00

AMDGPUAnnotateKernelFeatures.cpp

[Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes. Also affected in files (NFC).

2017-08-31 21:56:16 +00:00

AMDGPUAnnotateUniformValues.cpp

AMDGPU: Fix converting unanalyzable global loads to SMRD

2017-07-12 23:06:18 +00:00

AMDGPUArgumentUsageInfo.cpp

[CodeGen] Rename functions PrintReg* to printReg*

2017-11-28 12:42:37 +00:00

AMDGPUArgumentUsageInfo.h

[AMDGPU] Fixed MSVC build break

2017-08-04 10:53:07 +00:00

AMDGPUAsmPrinter.cpp

[AMDGPU] do not generate .AMDGPU.config for amdpal os type

2018-02-06 13:39:38 +00:00

AMDGPUAsmPrinter.h

[AMDGPU] add labels to +DumpCode output

2017-12-08 14:09:34 +00:00

AMDGPUCallingConv.td

AMDGPU: Initial implementation of calls

2017-08-01 19:54:18 +00:00

AMDGPUCallLowering.cpp

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

AMDGPUCallLowering.h

AMDGPU: Start defining a calling convention

2017-05-17 21:56:25 +00:00

AMDGPUCodeGenPrepare.cpp

Reapply "AMDGPU: Add 32-bit constant address space"

2018-02-09 16:57:57 +00:00

AMDGPUFrameLowering.cpp

[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI

2017-03-10 19:39:07 +00:00

AMDGPUFrameLowering.h

Move TargetFrameLowering.h to CodeGen where it's implemented

2017-11-03 22:32:11 +00:00

AMDGPUGenRegisterBankInfo.def

AMDGPU/GlobalISel: Use a more correct getValueMapping

2018-03-01 21:08:51 +00:00

AMDGPUInline.cpp

[AMDGPU] Port of HSAIL inliner

2017-09-20 04:25:58 +00:00

AMDGPUInstrInfo.cpp

Reapply "AMDGPU: Add 32-bit constant address space"

2018-02-09 16:57:57 +00:00

AMDGPUInstrInfo.h

AMDGPU: Fix layering issue

2018-02-09 16:57:48 +00:00

AMDGPUInstrInfo.td

AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}

2018-01-31 20:18:04 +00:00

AMDGPUInstructions.td

AMDGPU: Select BFI patterns with 64-bit ints

2018-02-07 00:21:34 +00:00

AMDGPUInstructionSelector.cpp

Reapply "AMDGPU: Add 32-bit constant address space"

2018-02-09 16:57:57 +00:00

AMDGPUInstructionSelector.h

[globalisel][tablegen] Generate rule coverage and use it to identify untested rules

2017-11-16 00:46:35 +00:00

AMDGPUIntrinsicInfo.cpp

Rename AttributeSet to AttributeList

2017-03-21 16:57:19 +00:00

AMDGPUIntrinsicInfo.h

AMDGPU: Change fdiv lowering based on !fpmath metadata

2016-07-19 23:16:53 +00:00

AMDGPUIntrinsics.td

AMDGPU: Remove legacy bfe intrinsics

2017-04-03 18:08:08 +00:00

AMDGPUISelDAGToDAG.cpp

Pass Divergence Analysis data to Selection DAG to drive divergence

2018-03-05 15:12:21 +00:00

AMDGPUISelLowering.cpp

Pass Divergence Analysis data to Selection DAG to drive divergence

2018-03-05 15:12:21 +00:00

AMDGPUISelLowering.h

AMDGPU: Fix build warning about override

2018-03-05 16:25:10 +00:00

AMDGPULegalizerInfo.cpp

AMDGPU/GlobalISel: Make some G_EXTRACTs legal

2018-03-05 16:25:15 +00:00

AMDGPULegalizerInfo.h

Re-commit AMDGPU/GlobalISel: Add support for simple shaders

2017-01-30 21:56:46 +00:00

AMDGPULibCalls.cpp

Make helpers static. NFC.

2017-11-24 14:55:41 +00:00

AMDGPULibFunc.cpp

[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc

2017-11-04 17:37:43 +00:00

AMDGPULibFunc.h

[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc

2017-11-04 17:37:43 +00:00

AMDGPULowerIntrinsics.cpp

Extend memcpy expansion in Transform/Utils to handle wider operand types.

2017-07-07 02:00:06 +00:00

AMDGPUMachineCFGStructurizer.cpp

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

AMDGPUMachineFunction.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

AMDGPUMachineFunction.h

Sort the remaining #include lines in include/... and lib/....

2017-06-06 11:49:48 +00:00

AMDGPUMachineModuleInfo.cpp

AMDGPU: Implement memory model

2017-07-21 21:19:23 +00:00

AMDGPUMachineModuleInfo.h

AMDGPU: Handle more than one memory operand in SIMemoryLegalizer

2017-09-07 16:14:21 +00:00

AMDGPUMacroFusion.cpp

AMDGPU: Add macro fusion schedule DAG mutation

2017-07-06 20:57:05 +00:00

AMDGPUMacroFusion.h

AMDGPU: Add macro fusion schedule DAG mutation

2017-07-06 20:57:05 +00:00

AMDGPUMCInstLower.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

AMDGPUMCInstLower.h

Reapply "AMDGPU: Support using tablegened MC pseudo expansions"

2016-10-06 17:19:11 +00:00

AMDGPUOpenCLEnqueuedBlockLowering.cpp

[AMDGPU] Fix lowering OpenCL enqueue_kernel

2018-03-06 16:04:39 +00:00

AMDGPUOpenCLImageTypeLoweringPass.cpp

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-08 23:53:55 +00:00

AMDGPUPromoteAlloca.cpp

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

AMDGPUPTNote.h

AMDGPU/NFC: Move AMDGPU specific note types to ELF.h

2017-10-12 18:59:54 +00:00

AMDGPURegAsmNames.inc.cpp

AMDGPU: Work around build special casing .inc files

2017-06-08 19:25:21 +00:00

AMDGPURegisterBankInfo.cpp

AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT

2018-03-05 16:25:18 +00:00

AMDGPURegisterBankInfo.h

AMDGPU/GlobalISel: Define instruction mapping for G_OR

2018-03-01 21:25:25 +00:00

AMDGPURegisterBanks.td

AMDGPU/GlobalISel: Define InstrMappings for G_ICMP

2018-03-01 19:27:10 +00:00

AMDGPURegisterInfo.cpp

[AMDGPU] Make sure all super regs of reserved regs are marked reserved.

2018-01-24 18:09:53 +00:00

AMDGPURegisterInfo.h

[AMDGPU] Return true in enableMultipleCopyHints().

2018-02-17 10:00:28 +00:00

AMDGPURegisterInfo.td

AMDGPU: Move INDIRECT_BASE_ADDR definition out of common files

2017-07-29 03:44:07 +00:00

AMDGPURewriteOutArguments.cpp

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-08 23:53:55 +00:00

AMDGPUSubtarget.cpp

[AMDGPU][MC] Added validation of d16 and r128 modifiers of MIMG opcodes

2018-02-05 12:45:43 +00:00

AMDGPUSubtarget.h

[AMDGPU] Scratch setup fix on AMDPAL gfx9+ merge shader

2018-02-26 14:46:43 +00:00

AMDGPUTargetMachine.cpp

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

AMDGPUTargetMachine.h

(Re-landing) Expose a TargetMachine::getTargetTransformInfo function

2017-12-22 18:21:59 +00:00

AMDGPUTargetObjectFile.cpp

AMDGPU: Fix set but not used warnings related to AMDGPUAS

2017-11-01 19:12:38 +00:00

AMDGPUTargetObjectFile.h

[AMDGPU] Get address space mapping by target triple environment

2017-03-27 14:04:01 +00:00

AMDGPUTargetTransformInfo.cpp

Pass Divergence Analysis data to Selection DAG to drive divergence

2018-03-05 15:12:21 +00:00

AMDGPUTargetTransformInfo.h

Revert "[AMDGPU] Increased vector length for global/constant loads."

2018-02-20 23:30:21 +00:00

AMDGPUUnifyDivergentExitNodes.cpp

[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

2017-10-17 21:27:42 +00:00

AMDGPUUnifyMetadata.cpp

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-10 00:46:15 +00:00

AMDILCFGStructurizer.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

AMDKernelCodeT.h

[AMDGPU] Revert r310429 changes in AMDKernelCodeT.h which broke some build bots.

2017-08-09 00:06:29 +00:00

BUFInstructions.td

[AMDGPU][MC] Added lds support for MUBUF instructions

2018-02-21 13:13:48 +00:00

CaymanInstructions.td

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

CMakeLists.txt

AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)

2017-11-20 14:35:53 +00:00

DSInstructions.td

AMDGPU: Stop using .NAME in .td files

2018-02-22 15:25:11 +00:00

EvergreenInstructions.td

AMDGPU: Select BFI patterns with 64-bit ints

2018-02-07 00:21:34 +00:00

FLATInstructions.td

[AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes

2017-11-27 17:14:35 +00:00

GCNHazardRecognizer.cpp

[AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and GCNHazardRecognizer::checkVALUHazardsHelper(). checkInlineAsmHazards() checks INLINEASM for hazards that we particularly care about (so not exhaustive); this patch adds a check for INLINEASM that defs vregs that hold data-to-be stored by immediately preceding store of more than 8 bytes. If the instr were not within an INLINEASM, this scenario would be handled by checkVALUHazard(). Add checkVALUHazardsHelper(), which will be called by both checkVALUHazards() and checkInlineAsmHazards().

2017-12-07 20:34:25 +00:00

GCNHazardRecognizer.h

[AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and GCNHazardRecognizer::checkVALUHazardsHelper(). checkInlineAsmHazards() checks INLINEASM for hazards that we particularly care about (so not exhaustive); this patch adds a check for INLINEASM that defs vregs that hold data-to-be stored by immediately preceding store of more than 8 bytes. If the instr were not within an INLINEASM, this scenario would be handled by checkVALUHazard(). Add checkVALUHazardsHelper(), which will be called by both checkVALUHazards() and checkInlineAsmHazards().

2017-12-07 20:34:25 +00:00

GCNILPSched.cpp

AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)

2017-11-20 14:35:53 +00:00

GCNIterativeScheduler.cpp

[NFC] fix trivial typos in comments and documents

2018-01-29 05:17:03 +00:00

GCNIterativeScheduler.h

AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)

2017-11-20 14:35:53 +00:00

GCNMinRegStrategy.cpp

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-08 23:53:55 +00:00

GCNProcessors.td

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

GCNRegPressure.cpp

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

GCNRegPressure.h

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

GCNSchedStrategy.cpp

[NFC] fix trivial typos in comments

2018-01-22 05:54:46 +00:00

GCNSchedStrategy.h

fix typos in comments and error messges; NFC

2017-07-13 06:48:39 +00:00

LLVMBuild.txt

AMDGPU: Add GlobalISel to required_libraries.

2017-01-28 18:13:08 +00:00

MIMGInstructions.td

[AMDGPU][MC] Added support of 64-bit image atomics

2018-01-26 15:43:29 +00:00

R600ClauseMergePass.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

R600ControlFlowFinalizer.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

R600Defines.h

AMDGPU: R600 code splitting cleanup

2016-03-11 08:00:27 +00:00

R600EmitClauseMarkers.cpp

Sort the remaining #include lines in include/... and lib/....

2017-06-06 11:49:48 +00:00

R600ExpandSpecialInstrs.cpp

[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

2017-08-10 00:46:15 +00:00

R600FrameLowering.cpp

Sort the remaining #include lines in include/... and lib/....

2017-06-06 11:49:48 +00:00

R600FrameLowering.h

AMDGPU: Initial implementation of calls

2017-08-01 19:54:18 +00:00

R600InstrFormats.td

AMDGPU: Remove global isGCN predicates

2017-10-03 00:06:41 +00:00

R600InstrInfo.cpp

[AMDGPU] Make sure all super regs of reserved regs are marked reserved.

2018-01-24 18:09:53 +00:00

R600InstrInfo.h

[AMDGPU] Make sure all super regs of reserved regs are marked reserved.

2018-01-24 18:09:53 +00:00

R600Instructions.td

AMDGPU: Move ADDRIndirect complex pattern into R600Instructions.td

2018-01-29 23:29:26 +00:00

R600Intrinsics.td

AMDGPU: Make intrinsics speculatable

2017-05-02 16:57:44 +00:00

R600ISelLowering.cpp

AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction

2017-12-04 23:07:28 +00:00

R600ISelLowering.h

Add DAG argument to canMergeStoresTo NFC.

2017-07-10 20:25:54 +00:00

R600MachineFunctionInfo.cpp

AMDGPU: Delete more dead code

2016-07-22 17:01:25 +00:00

R600MachineFunctionInfo.h

AMDGPU: Delete more dead code

2016-07-22 17:01:25 +00:00

R600MachineScheduler.cpp

[CodeGen] Rename DEBUG_TYPE to match passnames

2017-07-11 22:08:28 +00:00

R600MachineScheduler.h

[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

2016-12-09 22:06:55 +00:00

R600OptimizeVectorRegisters.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

R600Packetizer.cpp

AMDGPU/R600: Initialize more passes

2017-08-02 22:19:45 +00:00

R600Processors.td

AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction

2017-12-04 23:07:28 +00:00

R600RegisterInfo.cpp

[AMDGPU] Make sure all super regs of reserved regs are marked reserved.

2018-01-24 18:09:53 +00:00

R600RegisterInfo.h

AMDGPU: Start defining a calling convention

2017-05-17 21:56:25 +00:00

R600RegisterInfo.td

AMDGPU: Move INDIRECT_BASE_ADDR definition out of common files

2017-07-29 03:44:07 +00:00

R600Schedule.td

AMDGPU: Fix trailing whitespace

2016-06-10 02:18:02 +00:00

R700Instructions.td

R600 -> AMDGPU rename

2015-06-13 03:28:10 +00:00

SIAnnotateControlFlow.cpp

AMDGPU: Error in SIAnnotateControlFlow instead of assert

2018-01-17 16:30:01 +00:00

SIDebuggerInsertNops.cpp

Sort the remaining #include lines in include/... and lib/....

2017-06-06 11:49:48 +00:00

SIDefines.h

AMDGPU/SI: Add d16 support for image intrinsics.

2018-01-18 22:08:53 +00:00

SIFixSGPRCopies.cpp

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

SIFixVGPRCopies.cpp

[AMDGPU] Add VGPR copies post regalloc fix pass

2017-01-24 17:46:17 +00:00

SIFixWWMLiveness.cpp

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

SIFoldOperands.cpp

AMDGPU: Don't crash when trying to fold implicit operands

2018-02-08 01:12:46 +00:00

SIFrameLowering.cpp

[AMDGPU] Scratch setup fix on AMDPAL gfx9+ merge shader

2018-02-26 14:46:43 +00:00

SIFrameLowering.h

[AMDGPU] AMDPAL scratch buffer support

2017-09-29 09:49:35 +00:00

SIInsertSkips.cpp

Fix compiler warning introduced in r325931. NFC.

2018-02-23 19:11:33 +00:00

SIInsertWaitcnts.cpp

[AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.

2018-02-19 19:19:59 +00:00

SIInsertWaits.cpp

[NFC] fix trivial typos in comments

2018-02-22 07:48:29 +00:00

SIInstrFormats.td

[MachineOperand][Target] MachineOperand::isRenamable semantics changes

2018-02-23 18:25:08 +00:00

SIInstrInfo.cpp

[AMDGPU] added writelane intrinsic

2018-02-28 19:10:32 +00:00

SIInstrInfo.h

[AMDGPU][MC] Added lds support for MUBUF instructions

2018-02-21 13:13:48 +00:00

SIInstrInfo.td

[AMDGPU][MC] Added lds support for MUBUF instructions

2018-02-21 13:13:48 +00:00

SIInstructions.td

AMDGPU/GCN: Promote i16 ctpop

2018-03-02 02:50:22 +00:00

SIIntrinsics.td

AMDGPU: Remove legacy export intrinsic

2017-04-04 16:34:39 +00:00

SIISelLowering.cpp

[TargetLowering] Rename DAGCombinerInfo::isAfterLegalizeVectorOps to DAGCombiner::isAfterLegalizeDAG since that's what it checks. NFC

2018-03-06 19:44:52 +00:00

SIISelLowering.h

AMDGPU/SI: Add d16 support for buffer intrinsics.

2018-01-12 21:12:19 +00:00

SILoadStoreOptimizer.cpp

AMDGPU: Track physreg uses in SILoadStoreOptimizer

2018-02-23 10:45:56 +00:00

SILowerControlFlow.cpp

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

SILowerI1Copies.cpp

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

SIMachineFunctionInfo.cpp

Reapply "AMDGPU: Add 32-bit constant address space"

2018-02-09 16:57:57 +00:00

SIMachineFunctionInfo.h

[AMDGPU] stop buffer_store being moved illegally

2018-02-20 10:03:38 +00:00

SIMachineScheduler.cpp

Rename LiveIntervalAnalysis.h to LiveIntervals.h

2017-12-13 02:51:04 +00:00

SIMachineScheduler.h

AMDGPU/SI: Force exports at the end for SI scheduler

2017-07-25 20:36:58 +00:00

SIMemoryLegalizer.cpp

[AMDGPU] More descriptive names in the memory legalizer

2018-02-09 06:05:33 +00:00

SIOptimizeExecMasking.cpp

[MachineOperand][Target] MachineOperand::isRenamable semantics changes

2018-02-23 18:25:08 +00:00

SIOptimizeExecMaskingPreRA.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

SIPeepholeSDWA.cpp

AMDGPU: Process SDWA block at a time

2018-02-08 22:46:41 +00:00

SIRegisterInfo.cpp

[AMDGPU] : fix for the crash in SIRegisterInfo when the regiser class not found

2018-03-01 17:36:43 +00:00

SIRegisterInfo.h

[AMDGPU] Make sure all super regs of reserved regs are marked reserved.

2018-01-24 18:09:53 +00:00

SIRegisterInfo.td

[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support

2018-01-10 14:22:19 +00:00

SISchedule.td

AMDGPU: Implement early ifcvt target hooks.

2017-01-25 04:25:02 +00:00

SIShrinkInstructions.cpp

[AMDGPU] Shrinking V_SUBBREV_U32

2018-02-24 01:32:32 +00:00

SIWholeQuadMode.cpp

MachineFunction: Return reference from getFunction(); NFC

2017-12-15 22:22:58 +00:00

SMInstructions.td

Pass Divergence Analysis data to Selection DAG to drive divergence

2018-03-05 15:12:21 +00:00

SOPInstructions.td

AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic

2017-10-24 10:26:59 +00:00

VIInstrFormats.td

[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions

2016-09-23 09:08:07 +00:00

VIInstructions.td

AMDGPU: Add VI i16 support

2016-11-10 16:02:37 +00:00

VOP1Instructions.td

[AMDGPU] Copy impdefs from pseudo to real instructions

2018-01-15 17:55:35 +00:00

VOP2Instructions.td

[AMDGPU] added writelane intrinsic

2018-02-28 19:10:32 +00:00

VOP3Instructions.td

[AMDGPU] isRenamable fixes to support copy forwarding

2018-01-30 17:37:39 +00:00

VOP3PInstructions.td

AMDGPU: Add max-mix-insts subtarget feature

2017-10-25 07:00:51 +00:00

VOPCInstructions.td

[AMDGPU] Copy impdefs from pseudo to real instructions

2018-01-15 17:55:35 +00:00

VOPInstructions.td

[MachineOperand][Target] MachineOperand::isRenamable semantics changes

2018-02-23 18:25:08 +00:00