Jakob Stoklund Olesen dcd2342d32 Also pass logical ops to combineSelectAndUse. ... Add these transformations to the existing add/sub ones: (and (select cc, -1, c), x) -> (select cc, x, (and, x, c)) (or (select cc, 0, c), x) -> (select cc, x, (or, x, c)) (xor (select cc, 0, c), x) -> (select cc, x, (xor, x, c)) The selects can then be transformed to a single predicated instruction by peephole. This transformation will make it possible to eliminate the ISD::CAND, COR, and CXOR custom DAG nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162176 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-18 21:25:16 +00:00
..
ARM	Also pass logical ops to combineSelectAndUse.	2012-08-18 21:25:16 +00:00
CellSPU	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	Fix broken check lines.	2012-08-17 12:28:26 +00:00
Hexagon	[Hexagon] Don't mark callee saved registers as clobbered by a tail call	2012-08-13 19:54:01 +00:00
MBlaze
Mips	Test case for r162008.	2012-08-16 03:48:41 +00:00
MSP430	Reapply r161633-161634 "Partition use lists so defs always come before uses.""	2012-08-10 00:21:30 +00:00
NVPTX
PowerPC	During the CodeGenPrepare we often lower intrinsics (such as objsize)	2012-08-14 05:19:07 +00:00
SPARC	test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines.	2012-07-03 04:29:20 +00:00
Thumb	Fix the remaining TCL-style quotes found in the testsuite. This is	2012-07-02 19:09:46 +00:00
Thumb2	Add ADD and SUB to the predicable ARM instructions.	2012-08-16 23:21:55 +00:00
X86	Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.	2012-08-18 17:53:03 +00:00
XCore	Fix pattern for MKMSK instruction.	2012-06-13 17:59:12 +00:00