Akira Hatanaka e2bdf7fc93 Swap the operands of a select node if the false (the second) operand is 0. ... For example, this pattern (select (setcc lhs, rhs, cc), true, 0) is transformed to this one: (select (setcc lhs, rhs, inverse(cc)), 0, true) This enables MipsDAGToDAGISel::ReplaceUsesWithZeroReg (added in r152280) to replace 0 with $zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152285 91177308-0d34-0410-b5e6-96231b3b80d8		2012-03-08 02:14:24 +00:00
..
Analysis	Rotate two of the functions used to count bonuses for the inline cost	2012-03-08 02:04:19 +00:00
Archive	Avoid using an invalidated iterator.	2012-01-23 05:07:16 +00:00
AsmParser	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Bitcode	BitstreamWriter: Change primary output buffer to be a SmallVector instead of an	2012-02-29 20:31:09 +00:00
CodeGen	misched interface: Expose the MachineScheduler pass.	2012-03-08 01:41:12 +00:00
DebugInfo	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
ExecutionEngine	Improved support in RuntimeDyldMachO for generating	2012-03-07 23:05:25 +00:00
Linker	Include cctype for isdigit. Patch by Stephen Hines.	2012-03-03 09:36:58 +00:00
MC	Make MCRegisterInfo available to the the MCInstPrinter.	2012-03-05 19:33:20 +00:00
Object	[Object]	2012-03-01 22:19:54 +00:00
Support	Copy the right amount of elements.	2012-03-07 22:48:42 +00:00
TableGen	Fix infinite loop in nested multiclasses.	2012-03-07 16:39:35 +00:00
Target	Swap the operands of a select node if the false (the second) operand is 0.	2012-03-08 02:14:24 +00:00
Transforms	fix typos	2012-03-05 17:39:47 +00:00
VMCore	Switch this code to use hash_combine_range rather than incremental calls	2012-03-07 03:22:32 +00:00
CMakeLists.txt	Move TableGen's parser and entry point into a library	2011-10-01 16:41:13 +00:00
LLVMBuild.txt	LLVMBuild: Introduce a common section which currently has a list of the	2011-12-12 22:45:54 +00:00
Makefile