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I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
195 lines
7.3 KiB
C++
195 lines
7.3 KiB
C++
//===-- XRayInstrumentation.cpp - Adds XRay instrumentation to functions. -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a MachineFunctionPass that inserts the appropriate
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// XRay instrumentation instructions. We look for XRay-specific attributes
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// on the function to determine whether we should insert the replacement
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// operations.
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//
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//===---------------------------------------------------------------------===//
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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using namespace llvm;
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namespace {
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struct XRayInstrumentation : public MachineFunctionPass {
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static char ID;
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XRayInstrumentation() : MachineFunctionPass(ID) {
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initializeXRayInstrumentationPass(*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<MachineLoopInfo>();
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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private:
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// Replace the original RET instruction with the exit sled code ("patchable
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// ret" pseudo-instruction), so that at runtime XRay can replace the sled
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// with a code jumping to XRay trampoline, which calls the tracing handler
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// and, in the end, issues the RET instruction.
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// This is the approach to go on CPUs which have a single RET instruction,
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// like x86/x86_64.
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void replaceRetWithPatchableRet(MachineFunction &MF,
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const TargetInstrInfo *TII);
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// Prepend the original return instruction with the exit sled code ("patchable
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// function exit" pseudo-instruction), preserving the original return
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// instruction just after the exit sled code.
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// This is the approach to go on CPUs which have multiple options for the
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// return instruction, like ARM. For such CPUs we can't just jump into the
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// XRay trampoline and issue a single return instruction there. We rather
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// have to call the trampoline and return from it to the original return
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// instruction of the function being instrumented.
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void prependRetWithPatchableExit(MachineFunction &MF,
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const TargetInstrInfo *TII);
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};
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} // anonymous namespace
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void XRayInstrumentation::replaceRetWithPatchableRet(
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MachineFunction &MF, const TargetInstrInfo *TII) {
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// We look for *all* terminators and returns, then replace those with
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// PATCHABLE_RET instructions.
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SmallVector<MachineInstr *, 4> Terminators;
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for (auto &MBB : MF) {
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for (auto &T : MBB.terminators()) {
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unsigned Opc = 0;
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if (T.isReturn() && T.getOpcode() == TII->getReturnOpcode()) {
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// Replace return instructions with:
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// PATCHABLE_RET <Opcode>, <Operand>...
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Opc = TargetOpcode::PATCHABLE_RET;
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}
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if (TII->isTailCall(T)) {
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// Treat the tail call as a return instruction, which has a
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// different-looking sled than the normal return case.
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Opc = TargetOpcode::PATCHABLE_TAIL_CALL;
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}
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if (Opc != 0) {
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auto MIB = BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc))
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.addImm(T.getOpcode());
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for (auto &MO : T.operands())
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MIB.add(MO);
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Terminators.push_back(&T);
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}
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}
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}
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for (auto &I : Terminators)
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I->eraseFromParent();
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}
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void XRayInstrumentation::prependRetWithPatchableExit(
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MachineFunction &MF, const TargetInstrInfo *TII) {
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for (auto &MBB : MF) {
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for (auto &T : MBB.terminators()) {
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unsigned Opc = 0;
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if (T.isReturn()) {
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Opc = TargetOpcode::PATCHABLE_FUNCTION_EXIT;
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}
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if (TII->isTailCall(T)) {
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Opc = TargetOpcode::PATCHABLE_TAIL_CALL;
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}
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if (Opc != 0) {
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// Prepend the return instruction with PATCHABLE_FUNCTION_EXIT or
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// PATCHABLE_TAIL_CALL .
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BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc));
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}
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}
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}
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}
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bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) {
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auto &F = *MF.getFunction();
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auto InstrAttr = F.getFnAttribute("function-instrument");
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bool AlwaysInstrument = !InstrAttr.hasAttribute(Attribute::None) &&
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InstrAttr.isStringAttribute() &&
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InstrAttr.getValueAsString() == "xray-always";
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Attribute Attr = F.getFnAttribute("xray-instruction-threshold");
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unsigned XRayThreshold = 0;
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if (!AlwaysInstrument) {
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if (Attr.hasAttribute(Attribute::None) || !Attr.isStringAttribute())
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return false; // XRay threshold attribute not found.
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if (Attr.getValueAsString().getAsInteger(10, XRayThreshold))
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return false; // Invalid value for threshold.
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// Check if we have a loop.
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// FIXME: Maybe make this smarter, and see whether the loops are dependent
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// on inputs or side-effects?
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MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
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if (MLI.empty() && F.size() < XRayThreshold)
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return false; // Function is too small and has no loops.
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}
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// We look for the first non-empty MachineBasicBlock, so that we can insert
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// the function instrumentation in the appropriate place.
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auto MBI =
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find_if(MF, [&](const MachineBasicBlock &MBB) { return !MBB.empty(); });
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if (MBI == MF.end())
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return false; // The function is empty.
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auto *TII = MF.getSubtarget().getInstrInfo();
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auto &FirstMBB = *MBI;
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auto &FirstMI = *FirstMBB.begin();
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if (!MF.getSubtarget().isXRaySupported()) {
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FirstMI.emitError("An attempt to perform XRay instrumentation for an"
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" unsupported target.");
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return false;
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}
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// First, insert an PATCHABLE_FUNCTION_ENTER as the first instruction of the
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// MachineFunction.
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BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(),
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TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
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switch (MF.getTarget().getTargetTriple().getArch()) {
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case Triple::ArchType::arm:
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case Triple::ArchType::thumb:
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case Triple::ArchType::aarch64:
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case Triple::ArchType::ppc64le:
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case Triple::ArchType::mips:
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case Triple::ArchType::mipsel:
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case Triple::ArchType::mips64:
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case Triple::ArchType::mips64el:
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// For the architectures which don't have a single return instruction
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prependRetWithPatchableExit(MF, TII);
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break;
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default:
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// For the architectures that have a single return instruction (such as
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// RETQ on x86_64).
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replaceRetWithPatchableRet(MF, TII);
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break;
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}
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return true;
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}
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char XRayInstrumentation::ID = 0;
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char &llvm::XRayInstrumentationID = XRayInstrumentation::ID;
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INITIALIZE_PASS_BEGIN(XRayInstrumentation, "xray-instrumentation",
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"Insert XRay ops", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_END(XRayInstrumentation, "xray-instrumentation",
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"Insert XRay ops", false, false)
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