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e3e43d9d57
I did this a long time ago with a janky python script, but now clang-format has built-in support for this. I fed clang-format every line with a #include and let it re-sort things according to the precise LLVM rules for include ordering baked into clang-format these days. I've reverted a number of files where the results of sorting includes isn't healthy. Either places where we have legacy code relying on particular include ordering (where possible, I'll fix these separately) or where we have particular formatting around #include lines that I didn't want to disturb in this patch. This patch is *entirely* mechanical. If you get merge conflicts or anything, just ignore the changes in this patch and run clang-format over your #include lines in the files. Sorry for any noise here, but it is important to keep these things stable. I was seeing an increasing number of patches with irrelevant re-ordering of #include lines because clang-format was used. This patch at least isolates that churn, makes it easy to skip when resolving conflicts, and gets us to a clean baseline (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
120 lines
3.9 KiB
C++
120 lines
3.9 KiB
C++
//=- WebAssemblySetP2AlignOperands.cpp - Set alignments on loads and stores -=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file sets the p2align operands on load and store instructions.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssembly.h"
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-set-p2align-operands"
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namespace {
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class WebAssemblySetP2AlignOperands final : public MachineFunctionPass {
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public:
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static char ID; // Pass identification, replacement for typeid
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WebAssemblySetP2AlignOperands() : MachineFunctionPass(ID) {}
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StringRef getPassName() const override {
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return "WebAssembly Set p2align Operands";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addPreserved<MachineBlockFrequencyInfo>();
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AU.addPreservedID(MachineDominatorsID);
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // end anonymous namespace
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char WebAssemblySetP2AlignOperands::ID = 0;
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FunctionPass *llvm::createWebAssemblySetP2AlignOperands() {
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return new WebAssemblySetP2AlignOperands();
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}
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static void RewriteP2Align(MachineInstr &MI, unsigned OperandNo) {
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assert(MI.getOperand(OperandNo).getImm() == 0 &&
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"ISel should set p2align operands to 0");
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assert(MI.hasOneMemOperand() &&
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"Load and store instructions have exactly one mem operand");
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assert((*MI.memoperands_begin())->getSize() ==
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(UINT64_C(1)
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<< WebAssembly::GetDefaultP2Align(MI.getOpcode())) &&
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"Default p2align value should be natural");
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assert(MI.getDesc().OpInfo[OperandNo].OperandType ==
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WebAssembly::OPERAND_P2ALIGN &&
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"Load and store instructions should have a p2align operand");
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uint64_t P2Align = Log2_64((*MI.memoperands_begin())->getAlignment());
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// WebAssembly does not currently support supernatural alignment.
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P2Align = std::min(
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P2Align, uint64_t(WebAssembly::GetDefaultP2Align(MI.getOpcode())));
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MI.getOperand(OperandNo).setImm(P2Align);
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}
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bool WebAssemblySetP2AlignOperands::runOnMachineFunction(MachineFunction &MF) {
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DEBUG({
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dbgs() << "********** Set p2align Operands **********\n"
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<< "********** Function: " << MF.getName() << '\n';
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});
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bool Changed = false;
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for (auto &MBB : MF) {
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for (auto &MI : MBB) {
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switch (MI.getOpcode()) {
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case WebAssembly::LOAD_I32:
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case WebAssembly::LOAD_I64:
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case WebAssembly::LOAD_F32:
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case WebAssembly::LOAD_F64:
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case WebAssembly::LOAD8_S_I32:
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case WebAssembly::LOAD8_U_I32:
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case WebAssembly::LOAD16_S_I32:
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case WebAssembly::LOAD16_U_I32:
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case WebAssembly::LOAD8_S_I64:
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case WebAssembly::LOAD8_U_I64:
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case WebAssembly::LOAD16_S_I64:
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case WebAssembly::LOAD16_U_I64:
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case WebAssembly::LOAD32_S_I64:
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case WebAssembly::LOAD32_U_I64:
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RewriteP2Align(MI, WebAssembly::LoadP2AlignOperandNo);
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break;
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case WebAssembly::STORE_I32:
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case WebAssembly::STORE_I64:
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case WebAssembly::STORE_F32:
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case WebAssembly::STORE_F64:
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case WebAssembly::STORE8_I32:
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case WebAssembly::STORE16_I32:
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case WebAssembly::STORE8_I64:
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case WebAssembly::STORE16_I64:
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case WebAssembly::STORE32_I64:
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RewriteP2Align(MI, WebAssembly::StoreP2AlignOperandNo);
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break;
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default:
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break;
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}
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}
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}
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return Changed;
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}
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