Ulrich Weigand b9cdeecf25 [SystemZ] Add support for the "o" inline asm constraint ...

We don't really need any special handling of "offsettable"
memory addresses, but since some existing code uses inline
asm statements with the "o" constraint, add support for this
constraint for compatibility purposes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317807 91177308-0d34-0410-b5e6-96231b3b80d8

2017-11-09 16:31:57 +00:00

..

AArch64

[GlobalISel] Enable legalizing non-power-of-2 sized types.

2017-11-07 10:34:34 +00:00

AMDGPU

AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4

2017-11-09 01:52:55 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[GlobalISel] Enable legalizing non-power-of-2 sized types.

2017-11-07 10:34:34 +00:00

AVR

[AVR] Fix the select-mbb-placement-bug.ll

2017-10-20 04:17:14 +00:00

BPF

bpf: fix bug on silently truncating 64-bit immediate

2017-10-16 04:14:53 +00:00

Generic

Add an @llvm.sideeffect intrinsic

2017-11-08 21:59:51 +00:00

Hexagon

[Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr

2017-11-02 21:56:59 +00:00

Inputs

…

Lanai

MIR: Print the register class or bank in vreg defs

2017-10-24 18:04:54 +00:00

Mips

[mips] Correct microMIP's jump and add unconditional branch pseudo

2017-11-09 16:02:18 +00:00

MIR

[MIRPrinter] Use %subreg.xxx syntax for subregister index operands

2017-11-06 21:46:06 +00:00

MSP430

[DAG] Improve Aliasing of operations to static alloca

2017-07-18 20:06:24 +00:00

Nios2

[Nios2] Target registration

2017-05-29 09:48:30 +00:00

NVPTX

[NVPTX] Implement __nvvm_atom_add_gen_d builtin.

2017-11-07 22:10:54 +00:00

PowerPC

Use new vector insert half-word and byte instructions when we see insertelement on '8 x i16' and '16 x i8' types. Also extended existing lit testcase to cover these cases.

2017-11-07 20:55:43 +00:00

RISCV

[RISCV] Re-generate test/CodeGen/RISCV/alu32.ll using update_llc_test_checks.py

2017-11-09 15:45:42 +00:00

SPARC

Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""

2017-10-03 16:59:13 +00:00

SystemZ

[SystemZ] Add support for the "o" inline asm constraint

2017-11-09 16:31:57 +00:00

Thumb

[ARM] Dynamic stack alignment for 16-bit Thumb

2017-10-22 11:56:35 +00:00

Thumb2

[ARM] Honor -mfloat-abi for libcall calling convention

2017-10-26 21:42:32 +00:00

WebAssembly

[WebAssembly] Add a test for inline-asm "m" constraints.

2017-11-08 19:37:24 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

Sched model improving on btver2: JFPU01 resource, vtestp* for xmm.

2017-11-09 14:19:59 +00:00

XCore

[MC] Suppress .Lcfi labels when emitting textual assembly

2017-10-10 00:57:36 +00:00