Zoran Jovanovic facd39580a [mips][microMIPS] Implement TEQ, TGE, TGEU, TLT, TLTU and TNE instructions ...

Differential Revision: http://reviews.llvm.org/D9658


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247880 91177308-0d34-0410-b5e6-96231b3b80d8

2015-09-17 10:14:09 +00:00

..

AArch64

[AArch64] Fix problems in decoding generic MSR instructions

2015-07-15 08:10:30 +00:00

ARM

[ARM] Add v8.1a "Privileged Access Never" extension

2015-04-16 11:34:25 +00:00

Hexagon

[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.

2015-06-10 16:52:32 +00:00

Mips

[mips][microMIPS] Implement TEQ, TGE, TGEU, TLT, TLTU and TNE instructions

2015-09-17 10:14:09 +00:00

PowerPC

Scalar to vector conversions using direct moves

2015-08-13 17:40:44 +00:00

Sparc

[Sparc] Implement i64 load/store support for 32-bit sparc.

2015-08-10 19:11:39 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly

2015-08-26 16:20:29 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00