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InstPrinter
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
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MCTargetDesc
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Hexagon: Add constant extender support framework.
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2013-03-01 17:37:13 +00:00 |
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TargetInfo
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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CMakeLists.txt
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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Hexagon.h
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
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Hexagon.td
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HexagonAsmPrinter.cpp
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
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HexagonAsmPrinter.h
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Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.
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2012-12-29 15:23:06 +00:00 |
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HexagonCallingConv.td
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HexagonCallingConvLower.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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HexagonCallingConvLower.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
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HexagonCFGOptimizer.cpp
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HexagonExpandPredSpillCode.cpp
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HexagonFixupHwLoops.cpp
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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HexagonFrameLowering.cpp
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Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
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2013-02-21 20:05:00 +00:00 |
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HexagonFrameLowering.h
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Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
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2013-02-21 20:05:00 +00:00 |
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HexagonHardwareLoops.cpp
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
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HexagonInstrFormats.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
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HexagonInstrFormatsV4.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
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HexagonInstrInfo.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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HexagonInstrInfo.h
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Hexagon: Use MO operand flags to mark constant extended instructions.
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2013-03-05 18:51:42 +00:00 |
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HexagonInstrInfo.td
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Hexagon: Add patterns for zero extended loads from i1->i64.
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2013-03-08 14:15:15 +00:00 |
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HexagonInstrInfoV3.td
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HexagonInstrInfoV4.td
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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HexagonInstrInfoV5.td
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HexagonIntrinsics.td
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HexagonIntrinsicsDerived.td
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HexagonIntrinsicsV3.td
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HexagonIntrinsicsV4.td
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HexagonIntrinsicsV5.td
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HexagonISelDAGToDAG.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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HexagonISelLowering.cpp
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DAGCombiner: Use correct value type for checking legality of BR_CC v3
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2013-03-08 15:36:57 +00:00 |
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HexagonISelLowering.h
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Hexagon: Add support to lower block address.
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2013-03-07 19:10:28 +00:00 |
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HexagonMachineFunctionInfo.h
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HexagonMachineScheduler.cpp
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Cleanup #includes.
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2013-03-10 13:11:23 +00:00 |
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HexagonMachineScheduler.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
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HexagonMCInst.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
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HexagonMCInstLower.cpp
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
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HexagonNewValueJump.cpp
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HexagonOperands.td
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HexagonPeephole.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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HexagonRegisterInfo.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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HexagonRegisterInfo.h
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Remove code copied from GenRegisterInfo.inc.
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2013-02-22 01:15:08 +00:00 |
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HexagonRegisterInfo.td
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HexagonRemoveSZExtArgs.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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HexagonSchedule.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
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HexagonScheduleV4.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
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HexagonSelectCCInfo.td
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HexagonSelectionDAGInfo.cpp
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HexagonSelectionDAGInfo.h
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HexagonSplitTFRCondSets.cpp
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HexagonSubtarget.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
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HexagonSubtarget.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
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HexagonTargetMachine.cpp
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Hexagon: Use absolute addressing mode loads/stores for global+offset
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2013-02-13 21:38:46 +00:00 |
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HexagonTargetMachine.h
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Switch TargetTransformInfo from an immutable analysis pass that requires
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2013-01-07 01:37:14 +00:00 |
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HexagonTargetObjectFile.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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HexagonTargetObjectFile.h
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HexagonVarargsCallingConvention.h
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HexagonVLIWPacketizer.cpp
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Hexagon: Use MO operand flags to mark constant extended instructions.
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2013-03-05 18:51:42 +00:00 |
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LLVMBuild.txt
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Makefile
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