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c29a56dedb
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62074 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.0 KiB
LLVM
27 lines
1.0 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86
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; PR3244
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@g_62 = external global i16 ; <i16*> [#uses=1]
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@g_487 = external global i32 ; <i32*> [#uses=1]
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define i32 @func_42(i32 %p_43, i32 %p_44, i32 %p_45, i32 %p_46) nounwind {
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entry:
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%0 = load i16* @g_62, align 2 ; <i16> [#uses=1]
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%1 = load i32* @g_487, align 4 ; <i32> [#uses=1]
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%2 = trunc i16 %0 to i8 ; <i8> [#uses=1]
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%3 = trunc i32 %1 to i8 ; <i8> [#uses=1]
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%4 = tail call i32 (...)* @func_7(i64 -4455561449541442965, i32 1)
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nounwind ; <i32> [#uses=1]
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%5 = trunc i32 %4 to i8 ; <i8> [#uses=1]
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%6 = mul i8 %3, %2 ; <i8> [#uses=1]
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%7 = mul i8 %6, %5 ; <i8> [#uses=1]
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%8 = sext i8 %7 to i16 ; <i16> [#uses=1]
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%9 = tail call i32 @func_85(i16 signext %8, i32 1, i32 1) nounwind
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; <i32> [#uses=0]
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ret i32 undef
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}
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declare i32 @func_7(...)
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declare i32 @func_85(i16 signext, i32, i32)
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