Amaury de la Vieuville ebc3938ae7 ARM: check predicate bits for thumb instructions ...

When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-24 09:15:01 +00:00

..

AArch64

AArch64: fix overzealous NEXTing for Windows testing.

2013-06-23 15:32:01 +00:00

ARM

ARM: fix thumb1 nop decoding

2013-06-24 09:11:53 +00:00

AsmParser

Fix a bug in the MC asm parser evaluating expressions. It was treating:

2013-05-07 21:40:58 +00:00

COFF

[mc-coff] Forward Linker Option flags into the .drectve section

2013-04-25 19:34:41 +00:00

Disassembler

ARM: check predicate bits for thumb instructions

2013-06-24 09:15:01 +00:00

ELF

[MC/DWARF] Generate multiple .debug_line entries for adjacent .loc directives

2013-06-19 21:27:27 +00:00

MachO

Revert r15266. This fixes llvm.org/pr15266.

2013-02-14 16:23:08 +00:00

Markup

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MBlaze

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Mips

Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU registers.

2013-06-20 11:21:49 +00:00

PowerPC

[PowerPC] Support R_PPC_REL16 family of relocations

2013-06-21 14:44:37 +00:00

SystemZ

[SystemZ] Immediate compare-and-branch support

2013-05-29 11:58:52 +00:00

X86

Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.

2013-06-18 17:08:10 +00:00