Richard Osborne ebc64cf780 Lower add (mul a, b), c into MACCU / MACCS nodes which translate ...

directly to the maccu / maccs instructions. We handle this in
ExpandADDSUB since after type legalisation it is messy to
recognise these operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98150 91177308-0d34-0410-b5e6-96231b3b80d8

2010-03-10 11:41:08 +00:00

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Alpha

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ARM

Enable machine cse pass.

2010-03-10 03:07:41 +00:00

Blackfin

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CBackend

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CellSPU

fix bss section printing for cell, patch by Kalle Raiskila!

2010-03-05 18:55:36 +00:00

CPP

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Generic

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MBlaze

Re-committing the failed r97807 commit with changes to eliminate warnings.

2010-03-06 23:23:12 +00:00

Mips

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MSP430

Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).

2010-03-06 11:41:12 +00:00

PIC16

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PowerPC

Enable machine cse pass.

2010-03-10 03:07:41 +00:00

SPARC

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SystemZ

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Thumb

Enable machine cse pass.

2010-03-10 03:07:41 +00:00

Thumb2

Enable machine cse pass.

2010-03-10 03:07:41 +00:00

X86

Fix typo.

2010-03-10 07:07:55 +00:00

XCore

Lower add (mul a, b), c into MACCU / MACCS nodes which translate

2010-03-10 11:41:08 +00:00