llvm/test/CodeGen
Tom Stellard edcd88ce1a R600/SI: Add SIFoldOperands pass
This pass attempts to fold the source operands of mov and copy
instructions into their uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-21 22:06:37 +00:00
..
AArch64 DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal. 2014-11-21 06:39:58 +00:00
ARM Fix ARM triple parsing 2014-11-17 14:08:57 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] This patch implements functionality in MIPS delay slot 2014-11-21 22:04:35 +00:00
MSP430
NVPTX
PowerPC [PPC] Use SeparateConstOffsetFromGEP 2014-11-21 04:35:51 +00:00
R600 R600/SI: Add SIFoldOperands pass 2014-11-21 22:06:37 +00:00
SPARC
SystemZ
Thumb [Thumb1] Re-write emitThumbRegPlusImmediate 2014-11-17 11:18:10 +00:00
Thumb2
X86 Add a feature flag for slow 32-byte unaligned memory accesses [x86]. 2014-11-21 17:40:04 +00:00
XCore