Files
llvm/test/TableGen
Matt Arsenault b7c0307ccf GlobalISel/TableGen: Handle REG_SEQUENCE patterns
The scalar f64 patterns don't work yet because they fail on multiple
results from the unused implicit def of scc in the result bit
operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371542 91177308-0d34-0410-b5e6-96231b3b80d8
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