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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
94 lines
1.8 KiB
LLVM
94 lines
1.8 KiB
LLVM
; Test 32-bit ANDs in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check the lowest useful NILF value.
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define i32 @f1(i32 %a) {
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; CHECK: f1:
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; CHECK: nilf %r2, 1
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; CHECK: br %r14
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%and = and i32 %a, 1
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ret i32 %and
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}
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; Check the highest 16-bit constant that must be handled by NILF.
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define i32 @f2(i32 %a) {
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; CHECK: f2:
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; CHECK: nilf %r2, 65534
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; CHECK: br %r14
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%and = and i32 %a, 65534
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ret i32 %and
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}
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; ANDs of 0xffff are zero extensions from i16.
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define i32 @f3(i32 %a) {
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; CHECK: f3:
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; CHECK: llhr %r2, %r2
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; CHECK: br %r14
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%and = and i32 %a, 65535
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ret i32 %and
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}
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; Check the next value up, which must again use NILF.
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define i32 @f4(i32 %a) {
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; CHECK: f4:
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; CHECK: nilf %r2, 65536
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; CHECK: br %r14
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%and = and i32 %a, 65536
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ret i32 %and
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}
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; Check the lowest useful NILH value. (LLHR is used instead of NILH of 0.)
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define i32 @f5(i32 %a) {
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; CHECK: f5:
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; CHECK: nilh %r2, 1
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; CHECK: br %r14
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%and = and i32 %a, 131071
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ret i32 %and
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}
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; Check the highest useful NILF value.
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define i32 @f6(i32 %a) {
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; CHECK: f6:
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; CHECK: nilf %r2, 4294901758
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; CHECK: br %r14
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%and = and i32 %a, -65538
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ret i32 %and
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}
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; Check the highest useful NILH value, which is one up from the above.
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define i32 @f7(i32 %a) {
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; CHECK: f7:
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; CHECK: nilh %r2, 65534
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; CHECK: br %r14
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%and = and i32 %a, -65537
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ret i32 %and
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}
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; Check the low end of the NILL range, which is one up again.
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define i32 @f8(i32 %a) {
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; CHECK: f8:
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; CHECK: nill %r2, 0
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; CHECK: br %r14
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%and = and i32 %a, -65536
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ret i32 %and
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}
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; Check the next value up.
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define i32 @f9(i32 %a) {
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; CHECK: f9:
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; CHECK: nill %r2, 1
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; CHECK: br %r14
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%and = and i32 %a, -65535
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ret i32 %and
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}
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; Check the highest useful NILL value.
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define i32 @f10(i32 %a) {
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; CHECK: f10:
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; CHECK: nill %r2, 65534
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; CHECK: br %r14
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%and = and i32 %a, -2
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ret i32 %and
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}
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