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f606a6ed99
This adds a basic cost model for interleaved-access vectorization (and a better default for shuffles), and enables interleaved-access vectorization by default. The relevant difference from the default cost model for interleaved-access vectorization, is that on PPC, the shuffles that end up being used are *much* cheaper than modeling the process with insert/extract pairs (which are quite expensive, especially on older cores). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246824 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
; RUN: opt -S -basicaa -loop-vectorize < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define void @foo(double* noalias nocapture %a, double* noalias nocapture readonly %b) #0 {
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entry:
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br label %for.body
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; CHECK-LABEL: @foo
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; CHECK: <2 x double>
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for.cond.cleanup: ; preds = %for.body
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ret void
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%0 = shl nsw i64 %indvars.iv, 1
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%arrayidx = getelementptr inbounds double, double* %b, i64 %0
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%1 = load double, double* %arrayidx, align 8
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%add = fadd double %1, 1.000000e+00
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%arrayidx2 = getelementptr inbounds double, double* %a, i64 %indvars.iv
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store double %add, double* %arrayidx2, align 8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 1600
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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attributes #0 = { nounwind "target-cpu"="pwr8" }
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