Tom Stellard 58dd3a3775 AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal ...

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D36218

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309898 91177308-0d34-0410-b5e6-96231b3b80d8

2017-08-02 22:56:30 +00:00

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AArch64

[AArch64] Add Exynos M2 feature test (NFC)

2017-08-02 18:55:34 +00:00

AMDGPU

AMDGPU/GlobalISel: Mark 32-bit G_FMUL as legal

2017-08-02 22:56:30 +00:00

ARM

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

AVR

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BPF

DAG: Undo and->or combine with FrameIndexes

2017-08-02 00:43:42 +00:00

Generic

[TargetPassConfig] Feature generic options to setup start/stop-after/before

2017-07-31 18:24:07 +00:00

Hexagon

[Hexagon] Convert HVX vector constants of i1 to i8

2017-08-01 13:12:53 +00:00

Inputs

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Lanai

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Mips

[Mips] Fix for BBIT octeon instruction

2017-08-01 13:42:45 +00:00

MIR

[MIR] Print target-specific constant pools

2017-08-02 11:09:30 +00:00

MSP430

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Nios2

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NVPTX

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PowerPC

[Power9] Exploit vector absolute difference instructions on Power 9

2017-08-02 20:07:21 +00:00

SPARC

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SystemZ

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Thumb

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Thumb2

ARM: Do not use llc -march in tests.

2017-08-01 22:20:49 +00:00

WebAssembly

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WinEH

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X86

X86: Do not use llc -march in tests.

2017-08-02 00:28:10 +00:00

XCore

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