Thomas Lively f308fdbdc6 [WebAssembly] Narrowing and widening SIMD ops ...

Summary:
Implements target-specific LLVM intrinsics and clang builtins for
these new SIMD operations, as described at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D67425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371906 91177308-0d34-0410-b5e6-96231b3b80d8

2019-09-13 22:54:41 +00:00

..

AArch64

[GlobalISel] Fix insertion point of new instructions to be after PHIs.

2019-09-13 21:49:24 +00:00

AMDGPU

[GlobalISel] Fix insertion point of new instructions to be after PHIs.

2019-09-13 21:49:24 +00:00

ARC

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

ARM

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

AVR

[AVR] Fix tests after r363757

2019-07-04 06:12:47 +00:00

BPF

[BPF] Fix bpf llvm-objdump issues.

2019-08-17 22:12:00 +00:00

Generic

Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""

2019-09-10 10:39:09 +00:00

Hexagon

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Inputs

[CodeGen] Add stack protector tests where the guard gets re-assigned

2019-07-17 20:46:16 +00:00

Lanai

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Mips

[MIPS GlobalISel] Select indirect branch

2019-09-12 11:44:36 +00:00

MIR

[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC

2019-09-13 14:18:36 +00:00

MSP430

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00

NVPTX

[NVPTX] Fix PR41651

2019-07-30 19:52:01 +00:00

PowerPC

[PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC

2019-09-13 14:18:36 +00:00

RISCV

[RISCV] Support stack offset exceed 32-bit for RV64

2019-09-13 04:03:32 +00:00

SPARC

[test] Fix tests when run on windows after SVN r369426. NFC.

2019-08-20 20:58:02 +00:00

SystemZ

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Thumb

[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing

2019-09-11 11:16:48 +00:00

Thumb2

[ARM] Add support for MVE vmaxv and vminv

2019-09-13 09:11:46 +00:00

WebAssembly

[WebAssembly] Narrowing and widening SIMD ops

2019-09-13 22:54:41 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

[Windows] Replace TrapUnreachable with an int3 insertion pass

2019-09-09 23:04:25 +00:00

X86

[Test] Restructure check lines to show differences between modes more clearly

2019-09-12 23:22:37 +00:00

XCore

[lit] Delete empty lines at the end of lit.local.cfg NFC

2019-06-17 09:51:07 +00:00