Matt Arsenault 757642511d AMDGPU: Add ds_{read|write}_addtid_b32 definitions ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312349 91177308-0d34-0410-b5e6-96231b3b80d8

2017-09-01 18:38:02 +00:00

..

AArch64

[AArch64] v8.3-a complex number support

2017-08-31 09:27:04 +00:00

AMDGPU

AMDGPU: Add ds_{read|write}_addtid_b32 definitions

2017-09-01 18:38:02 +00:00

ARM

[ARM] Add 2-operand assembly aliases for Thumb1 ADD/SUB

2017-09-01 10:47:25 +00:00

AsmParser

[AsmParser] Recommit: Hash is not a comment on some targets

2017-08-21 09:58:37 +00:00

AVR

[AVR] Remove a bunch of now-obselete tests

2017-07-01 05:23:13 +00:00

COFF

[codeview] Change readobj symbol dumping format

2017-07-11 23:41:41 +00:00

Disassembler

[AArch64] v8.3-a complex number support

2017-08-31 09:27:04 +00:00

ELF

Don't pass the code model to MC

2017-08-02 20:32:26 +00:00

Hexagon

[Hexagon] Handle a global operand to A2_addi when creating duplexes

2017-06-22 15:53:31 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

ARM: use an external relocation for calls from MachO ARM mode.

2017-08-18 19:13:56 +00:00

Markup

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Mips

Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""

2017-08-14 16:20:33 +00:00

PowerPC

[Power9] Add new instructions for floating point status and control registers.

2017-08-28 18:46:01 +00:00

RISCV

[RISCV] Add RISCVInstPrinter and basic MC assembler tests

2017-08-15 13:08:29 +00:00

Sparc

[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed

2017-07-25 15:28:28 +00:00

SystemZ

[SystemZ, AsmParser] Enable the mnemonic spell corrector.

2017-07-18 09:17:00 +00:00

WebAssembly

[WebAssembly] Update relocation names to match spec

2017-09-01 17:32:01 +00:00

X86

[LLVM][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints

2017-08-24 09:08:33 +00:00