llvm/test/CodeGen
Akira Hatanaka f894199a14 [mips] Trap on integer division by zero.
By default, a teq instruction is inserted after integer divide. No divide-by-zero
checks are performed if option "-mnocheck-zero-division" is used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182306 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-20 18:07:43 +00:00
..
AArch64 More test coverage for addFrameMove. 2013-05-16 20:50:56 +00:00
ARM PR15868 fix. 2013-05-20 08:01:34 +00:00
CPP
Generic
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips [mips] Trap on integer division by zero. 2013-05-20 18:07:43 +00:00
MSP430 DAGCombiner: Simplify inverted bit tests 2013-05-08 06:44:42 +00:00
NVPTX [NVPTX] Fix mis-use of CurrentFnSym in NVPTXAsmPrinter. This was causing a symbol name error in the output PTX. 2013-05-20 16:42:18 +00:00
PowerPC Check InlineAsm clobbers in PPCCTRLoops 2013-05-18 09:20:39 +00:00
R600 R600: Fix rotr.ll on non-asserts builds 2013-05-20 15:28:48 +00:00
SI
SPARC Also expand 64-bit bitcasts. 2013-05-20 01:01:43 +00:00
SystemZ [SystemZ] Add long branch pass 2013-05-20 14:23:08 +00:00
Thumb
Thumb2 Fix ARM FastISel tests, as a first step to enabling ARM FastISel 2013-05-14 16:26:38 +00:00
X86 X86: Bad peephole interaction between adc, MOV32r0 2013-05-18 01:02:03 +00:00
XCore [XCore] Fix handling of functions where only the LR is spilled. 2013-05-09 16:43:42 +00:00