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f91130f149
This is a set of register units intended to track register liveness, it is similar in spirit to LivePhysRegs. You can also think of this as the liveness tracking parts of the RegisterScavenger factored out into an own class. This was proposed in http://llvm.org/PR27609 Differential Revision: http://reviews.llvm.org/D21916 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292542 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
3.4 KiB
C++
98 lines
3.4 KiB
C++
//===--- LiveRegUnits.cpp - Register Unit Set -----------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file imlements the LiveRegUnits set.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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using namespace llvm;
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void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
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for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
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for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
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if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
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Units.reset(U);
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}
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}
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}
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void LiveRegUnits::stepBackward(const MachineInstr &MI) {
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// Remove defined registers and regmask kills from the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (!O->isDef())
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continue;
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unsigned Reg = O->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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continue;
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removeReg(Reg);
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} else if (O->isRegMask())
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removeRegsNotPreserved(O->getRegMask());
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}
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// Add uses to the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg())
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continue;
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unsigned Reg = O->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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continue;
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addReg(Reg);
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}
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}
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/// Add live-in registers of basic block \p MBB to \p LiveUnits.
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static void addLiveIns(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB) {
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for (const auto &LI : MBB.liveins())
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LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
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}
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static void addLiveOuts(LiveRegUnits &LiveUnits, const MachineBasicBlock &MBB) {
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// To get the live-outs we simply merge the live-ins of all successors.
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for (const MachineBasicBlock *Succ : MBB.successors())
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addLiveIns(LiveUnits, *Succ);
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}
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/// Add pristine registers to the given \p LiveUnits. This function removes
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/// actually saved callee save registers when \p InPrologueEpilogue is false.
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static void removeSavedRegs(LiveRegUnits &LiveUnits, const MachineFunction &MF,
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const MachineFrameInfo &MFI,
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const TargetRegisterInfo &TRI) {
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for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
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LiveUnits.removeReg(Info.getReg());
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}
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void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
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const MachineFunction &MF = *MBB.getParent();
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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if (MFI.isCalleeSavedInfoValid()) {
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for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)
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addReg(*I);
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if (!MBB.isReturnBlock())
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removeSavedRegs(*this, MF, MFI, *TRI);
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}
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::addLiveOuts(*this, MBB);
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}
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void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
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const MachineFunction &MF = *MBB.getParent();
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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if (MFI.isCalleeSavedInfoValid()) {
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for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)
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addReg(*I);
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if (&MBB != &MF.front())
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removeSavedRegs(*this, MF, MFI, *TRI);
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}
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::addLiveIns(*this, MBB);
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}
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