Reid Kleckner f93099eb1c CodeGen: Handle va_start in the entry block ... Also fix a small copy-paste bug in X86ISelLowering where Chain should have been used in place of DAG.getEntryToken(). Fixes PR20828. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216929 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-02 18:42:44 +00:00
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AArch64	Replace -use-init-array with -use-ctors.	2014-09-02 13:54:53 +00:00
ARM	[ARM] Add Thumb-2 code size optimization regression test for EOR.	2014-09-01 12:59:34 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
Hexagon	DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.	2014-08-06 00:21:25 +00:00
Inputs	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Mips	Replace -use-init-array with -use-ctors.	2014-09-02 13:54:53 +00:00
MSP430	Do not assume the value passed to memset is an i32.	2014-08-29 08:23:53 +00:00
NVPTX	[MachineSink] Use the real post dominator tree	2014-09-01 03:47:25 +00:00
PowerPC	Enable splitting indexing from loads with TargetConstants	2014-09-02 16:05:23 +00:00
R600	R600/SI: Use mad for fsub + fmul	2014-08-29 16:01:14 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
Thumb2	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
X86	CodeGen: Handle va_start in the entry block	2014-09-02 18:42:44 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00