mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-27 22:55:15 +00:00
f98f2ce29e
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.3 KiB
C++
49 lines
1.3 KiB
C++
//===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
/// \file
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef AMDGPU_H
|
|
#define AMDGPU_H
|
|
|
|
#include "AMDGPUTargetMachine.h"
|
|
#include "llvm/Support/TargetRegistry.h"
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
namespace llvm {
|
|
|
|
class FunctionPass;
|
|
class AMDGPUTargetMachine;
|
|
|
|
// R600 Passes
|
|
FunctionPass* createR600KernelParametersPass(const DataLayout *TD);
|
|
FunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm);
|
|
|
|
// SI Passes
|
|
FunctionPass *createSIAssignInterpRegsPass(TargetMachine &tm);
|
|
FunctionPass *createSILowerControlFlowPass(TargetMachine &tm);
|
|
FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
|
|
FunctionPass *createSILowerLiteralConstantsPass(TargetMachine &tm);
|
|
FunctionPass *createSIFixSGPRLivenessPass(TargetMachine &tm);
|
|
|
|
// Passes common to R600 and SI
|
|
FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
|
|
|
|
} // End namespace llvm
|
|
|
|
namespace ShaderType {
|
|
enum Type {
|
|
PIXEL = 0,
|
|
VERTEX = 1,
|
|
GEOMETRY = 2,
|
|
COMPUTE = 3
|
|
};
|
|
}
|
|
|
|
#endif // AMDGPU_H
|