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Selected: the InstructionSelect pass ran and all pre-isel generic instructions have been eliminated; i.e., all instructions are now target-specific or non-pre-isel generic instructions (e.g., COPY). Since only pre-isel generic instructions can have generic virtual register operands, this also means that all generic virtual registers have been constrained to virtual registers (assigned to register classes) and that all sizes attached to them have been eliminated. This lets us enforce certain invariants across passes. This property is GlobalISel-specific, but is always available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277482 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
767 B
YAML
41 lines
767 B
YAML
# RUN: llc -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses GlobalISel MachineFunction
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# properties correctly.
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# This doesn't require GlobalISel to be built, as the properties are always
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# available in CodeGen.
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--- |
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define i32 @test_defaults() {
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entry:
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ret i32 0
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}
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define i32 @test() {
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start:
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ret i32 0
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}
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...
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---
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# CHECK-LABEL: name: test_defaults
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# CHECK: legalized: false
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# CHECK-NEXT: regBankSelected: false
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# CHECK-NEXT: selected: false
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name: test_defaults
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body: |
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bb.0:
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...
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---
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# CHECK-LABEL: name: test
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# CHECK: legalized: true
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# CHECK-NEXT: regBankSelected: true
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# CHECK-NEXT: selected: true
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name: test
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legalized: true
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regBankSelected: true
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selected: true
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body: |
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bb.0:
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...
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