Files
llvm/test/CodeGen
Amara Emerson 48313e1bf7 [AArch64][GlobalISel] Add support for s128 loads, stores, extracts, truncs.
We need to be able to load and store s128 for memcpy inlining, where we want to
generate Q register mem ops. Making these legal also requires that we add some
support in other instructions. Regbankselect should also know about these since
they have no GPR register class that can hold them, so need special handling to
live on the FPR bank.

Differential Revision: https://reviews.llvm.org/D65166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366857 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-23 22:05:13 +00:00
..
2019-07-04 06:12:47 +00:00