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https://github.com/RPCSX/SPIRV-Tools.git
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Support SPV_KHR_vulkan_memory_model rev2
Support collapsed into one commit: - Asm/Dis support for SPV_KHR_vulkan_memory_model - Add Vulkan mem model image operands to switch - Add TODO for source/validate_image.cpp - val: Image operands NonPrivateTexelKHR, VolatileTexelKHR have no operands This is required for memory model tests to pass SPIR-V validation. - Round trip tests: Test new flags on OpCopyMemory*
This commit is contained in:
David Neto
parent
21bcb9d8b9
commit
571251c8f8
@ -55,6 +55,13 @@ bool CheckAllImageOperandsHandled() {
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case SpvImageOperandsConstOffsetsMask:
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case SpvImageOperandsSampleMask:
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case SpvImageOperandsMinLodMask:
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// TODO(dneto): Support image operands related to the Vulkan memory model.
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// https://gitlab.khronos.org/spirv/spirv-tools/issues/32
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case SpvImageOperandsMakeTexelAvailableKHRMask:
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case SpvImageOperandsMakeTexelVisibleKHRMask:
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case SpvImageOperandsNonPrivateTexelKHRMask:
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case SpvImageOperandsVolatileTexelKHRMask:
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return true;
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}
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return false;
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@ -210,7 +217,12 @@ spv_result_t ValidateImageOperands(ValidationState_t& _,
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const SpvOp opcode = inst->opcode();
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const size_t num_words = inst->words().size();
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size_t expected_num_image_operand_words = spvtools::utils::CountSetBits(mask);
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// NonPrivate and Volatile take no operand words.
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const uint32_t mask_bits_having_operands =
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mask & ~uint32_t(SpvImageOperandsNonPrivateTexelKHRMask |
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SpvImageOperandsVolatileTexelKHRMask);
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size_t expected_num_image_operand_words =
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spvtools::utils::CountSetBits(mask_bits_having_operands);
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if (mask & SpvImageOperandsGradMask) {
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// Grad uses two words.
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++expected_num_image_operand_words;
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@ -890,8 +890,8 @@ INSTANTIATE_TEST_CASE_P(
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"Invalid function control operand: 31 has invalid mask component 16"},
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{"OpLoopMerge %1 %2 !1027",
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"Invalid loop control operand: 1027 has invalid mask component 1024"},
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{"%2 = OpImageFetch %1 %image %coord !511",
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"Invalid image operand: 511 has invalid mask component 256"},
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{"%2 = OpImageFetch %1 %image %coord !32770",
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"Invalid image operand: 32770 has invalid mask component 32768"},
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{"OpSelectionMerge %1 !7",
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"Invalid selection control operand: 7 has invalid mask component 4"},
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}), );
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@ -604,16 +604,18 @@ INSTANTIATE_TEST_CASE_P(
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})), );
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// See SPIR-V Section 3.27 Scope <id>
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INSTANTIATE_TEST_CASE_P(Scope, EnumCapabilityTest,
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Combine(Values(SPV_ENV_UNIVERSAL_1_0,
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SPV_ENV_UNIVERSAL_1_1),
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ValuesIn(std::vector<EnumCapabilityCase>{
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CASE0(SCOPE_ID, ScopeCrossDevice),
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CASE0(SCOPE_ID, ScopeDevice),
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CASE0(SCOPE_ID, ScopeWorkgroup),
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CASE0(SCOPE_ID, ScopeSubgroup),
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CASE0(SCOPE_ID, ScopeInvocation),
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})), );
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INSTANTIATE_TEST_CASE_P(
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Scope, EnumCapabilityTest,
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Combine(Values(SPV_ENV_UNIVERSAL_1_0, SPV_ENV_UNIVERSAL_1_1,
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SPV_ENV_UNIVERSAL_1_2, SPV_ENV_UNIVERSAL_1_3),
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ValuesIn(std::vector<EnumCapabilityCase>{
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CASE0(SCOPE_ID, ScopeCrossDevice),
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CASE0(SCOPE_ID, ScopeDevice),
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CASE0(SCOPE_ID, ScopeWorkgroup),
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CASE0(SCOPE_ID, ScopeSubgroup),
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CASE0(SCOPE_ID, ScopeInvocation),
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CASE1(SCOPE_ID, ScopeQueueFamilyKHR, VulkanMemoryModelKHR),
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})), );
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// See SPIR-V Section 3.28 Group Operation
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INSTANTIATE_TEST_CASE_P(
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@ -89,9 +89,10 @@ INSTANTIATE_TEST_CASE_P(
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::testing::ValuesIn(std::vector<MaskExpansionCase>{
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// No bits means no change.
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{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS, 0, {PREFIX0}, {PREFIX0}},
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// Unknown bits means no change.
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// Unknown bits means no change. Use all bits that aren't in the grammar.
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// The last mask enum is 0x20
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{SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS,
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0xfffffffc,
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0xffffffc0,
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{PREFIX1},
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{PREFIX1}},
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// Volatile has no operands.
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@ -510,6 +510,147 @@ INSTANTIATE_TEST_CASE_P(
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{SpvCapabilityVariablePointersStorageBuffer})},
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})), );
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// SPV_KHR_vulkan_memory_model
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INSTANTIATE_TEST_CASE_P(
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SPV_KHR_vulkan_memory_model, ExtensionRoundTripTest,
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// We'll get coverage over operand tables by trying the universal
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// environments, and at least one specific environment.
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//
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// Note: SPV_KHR_vulkan_memory_model adds scope enum value QueueFamilyKHR.
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// Scope enums are used in ID defini
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Combine(
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Values(SPV_ENV_UNIVERSAL_1_0, SPV_ENV_UNIVERSAL_1_1,
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SPV_ENV_UNIVERSAL_1_3, SPV_ENV_VULKAN_1_0, SPV_ENV_VULKAN_1_1),
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ValuesIn(std::vector<AssemblyCase>{
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{"OpCapability VulkanMemoryModelKHR\n",
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MakeInstruction(SpvOpCapability,
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{SpvCapabilityVulkanMemoryModelKHR})},
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{"OpCapability VulkanMemoryModelDeviceScopeKHR\n",
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MakeInstruction(SpvOpCapability,
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{SpvCapabilityVulkanMemoryModelDeviceScopeKHR})},
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{"OpMemoryModel Logical VulkanKHR\n",
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MakeInstruction(SpvOpMemoryModel, {SpvAddressingModelLogical,
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SpvMemoryModelVulkanKHR})},
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{"OpStore %1 %2 MakePointerAvailableKHR %3\n",
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MakeInstruction(SpvOpStore,
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{1, 2, SpvMemoryAccessMakePointerAvailableKHRMask,
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3})},
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{"OpStore %1 %2 Volatile|MakePointerAvailableKHR %3\n",
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MakeInstruction(SpvOpStore,
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{1, 2,
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int(SpvMemoryAccessMakePointerAvailableKHRMask) |
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int(SpvMemoryAccessVolatileMask),
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3})},
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{"OpStore %1 %2 Aligned|MakePointerAvailableKHR 4 %3\n",
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MakeInstruction(SpvOpStore,
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{1, 2,
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int(SpvMemoryAccessMakePointerAvailableKHRMask) |
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int(SpvMemoryAccessAlignedMask),
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4, 3})},
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{"OpStore %1 %2 MakePointerAvailableKHR|NonPrivatePointerKHR %3\n",
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MakeInstruction(SpvOpStore,
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{1, 2,
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int(SpvMemoryAccessMakePointerAvailableKHRMask) |
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int(SpvMemoryAccessNonPrivatePointerKHRMask),
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3})},
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{"%2 = OpLoad %1 %3 MakePointerVisibleKHR %4\n",
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MakeInstruction(SpvOpLoad,
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{1, 2, 3, SpvMemoryAccessMakePointerVisibleKHRMask,
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4})},
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{"%2 = OpLoad %1 %3 Volatile|MakePointerVisibleKHR %4\n",
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MakeInstruction(SpvOpLoad,
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{1, 2, 3,
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int(SpvMemoryAccessMakePointerVisibleKHRMask) |
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int(SpvMemoryAccessVolatileMask),
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4})},
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{"%2 = OpLoad %1 %3 Aligned|MakePointerVisibleKHR 8 %4\n",
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MakeInstruction(SpvOpLoad,
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{1, 2, 3,
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int(SpvMemoryAccessMakePointerVisibleKHRMask) |
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int(SpvMemoryAccessAlignedMask),
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8, 4})},
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{"%2 = OpLoad %1 %3 MakePointerVisibleKHR|NonPrivatePointerKHR "
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"%4\n",
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MakeInstruction(SpvOpLoad,
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{1, 2, 3,
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int(SpvMemoryAccessMakePointerVisibleKHRMask) |
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int(SpvMemoryAccessNonPrivatePointerKHRMask),
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4})},
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{"OpCopyMemory %1 %2 "
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"MakePointerAvailableKHR|"
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"MakePointerVisibleKHR|"
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"NonPrivatePointerKHR "
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"%3 %4\n",
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MakeInstruction(SpvOpCopyMemory,
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{1, 2,
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(int(SpvMemoryAccessMakePointerVisibleKHRMask) |
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int(SpvMemoryAccessMakePointerAvailableKHRMask) |
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int(SpvMemoryAccessNonPrivatePointerKHRMask)),
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3, 4})},
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{"OpCopyMemorySized %1 %2 %3 "
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"MakePointerAvailableKHR|"
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"MakePointerVisibleKHR|"
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"NonPrivatePointerKHR "
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"%4 %5\n",
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MakeInstruction(SpvOpCopyMemorySized,
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{1, 2, 3,
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(int(SpvMemoryAccessMakePointerVisibleKHRMask) |
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int(SpvMemoryAccessMakePointerAvailableKHRMask) |
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int(SpvMemoryAccessNonPrivatePointerKHRMask)),
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4, 5})},
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// Image operands
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{"OpImageWrite %1 %2 %3 MakeTexelAvailableKHR "
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"%4\n",
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MakeInstruction(
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SpvOpImageWrite,
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{1, 2, 3, int(SpvImageOperandsMakeTexelAvailableKHRMask), 4})},
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{"OpImageWrite %1 %2 %3 MakeTexelAvailableKHR|NonPrivateTexelKHR "
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"%4\n",
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MakeInstruction(SpvOpImageWrite,
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{1, 2, 3,
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int(SpvImageOperandsMakeTexelAvailableKHRMask) |
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int(SpvImageOperandsNonPrivateTexelKHRMask),
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4})},
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{"OpImageWrite %1 %2 %3 "
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"MakeTexelAvailableKHR|NonPrivateTexelKHR|VolatileTexelKHR "
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"%4\n",
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MakeInstruction(SpvOpImageWrite,
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{1, 2, 3,
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int(SpvImageOperandsMakeTexelAvailableKHRMask) |
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int(SpvImageOperandsNonPrivateTexelKHRMask) |
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int(SpvImageOperandsVolatileTexelKHRMask),
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4})},
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{"%2 = OpImageRead %1 %3 %4 MakeTexelVisibleKHR "
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"%5\n",
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MakeInstruction(SpvOpImageRead,
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{1, 2, 3, 4,
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int(SpvImageOperandsMakeTexelVisibleKHRMask),
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5})},
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{"%2 = OpImageRead %1 %3 %4 "
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"MakeTexelVisibleKHR|NonPrivateTexelKHR "
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"%5\n",
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MakeInstruction(SpvOpImageRead,
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{1, 2, 3, 4,
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int(SpvImageOperandsMakeTexelVisibleKHRMask) |
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int(SpvImageOperandsNonPrivateTexelKHRMask),
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5})},
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{"%2 = OpImageRead %1 %3 %4 "
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"MakeTexelVisibleKHR|NonPrivateTexelKHR|VolatileTexelKHR "
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"%5\n",
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MakeInstruction(SpvOpImageRead,
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{1, 2, 3, 4,
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int(SpvImageOperandsMakeTexelVisibleKHRMask) |
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int(SpvImageOperandsNonPrivateTexelKHRMask) |
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int(SpvImageOperandsVolatileTexelKHRMask),
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5})},
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// Memory semantics ID values are numbers put into a SPIR-V
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// constant integer referenced by Id. There is no token for
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// them, and so no assembler or disassembler support required.
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// Similar for Scope ID.
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})), );
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// SPV_GOOGLE_decorate_string
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INSTANTIATE_TEST_CASE_P(
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