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274 Commits

Author SHA1 Message Date
Matt Arsenault
6e1ede8ee8 AMDGPU: Re-use TM.getNullPointerValue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297662 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-03-13 20:18:14 +00:00
Matt Arsenault
32cb946c46 AMDGPU: Treat 0 as private null pointer in addrspacecast lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297658 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-03-13 19:47:31 +00:00
Matt Arsenault
a8ffe4b37c AMDGPU: Remove packf16 intrinsic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297557 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-03-11 05:51:16 +00:00
Matt Arsenault
dd2186aaab AMDGPU: Use v_med3_{f16|i16|u16} 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296401 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-27 22:40:39 +00:00
Matt Arsenault
27f4f2f4bc AMDGPU: Support v2i16/v2f16 packed operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296396 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-27 22:15:25 +00:00
Matt Arsenault
a4e4156e12 AMDGPU: Support inlineasm for packed instructions 
Add packed types as legal so they may be used with inlineasm.
Keep all operations expanded for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296379 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-27 20:52:10 +00:00
Matt Arsenault
cd39b42cab AMDGPU: Use clamp with f64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295908 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 23:53:37 +00:00
Wei Ding
1cfed01e02 AMDGPU : Update TrapCode based on Trap Handler ABI. 
Differential Revision: http://reviews.llvm.org/D30232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295904 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 23:22:19 +00:00
Matt Arsenault
c2d34b5027 AMDGPU: Add replacement bfe intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295899 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 23:04:58 +00:00
Matt Arsenault
c1d17d5f71 AMDGPU: Don't look at chain users when adjusting writemask 
Fixes not adjusting using new intrinsics with chains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295878 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 21:16:41 +00:00
Wei Ding
9b1c9472f5 Revert "AMDGPU : Update TrapCode based on Trap Handler ABI." 
This reverts commit r295867.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295871 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 20:29:22 +00:00
Wei Ding
d70493f450 AMDGPU : Update TrapCode based on Trap Handler ABI. 
Differential Revision: http://reviews.llvm.org/D30232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295867 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 20:05:06 +00:00
Matt Arsenault
7d65faa5cc AMDGPU: Add cvt.pkrtz intrinsic 
Convert llvm.SI.packf16 test uses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295797 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-22 00:27:34 +00:00
Matt Arsenault
aac82e218f AMDGPU: Redefine clamp node as clamp 0.0-1.0 
Change implementation to use max instead of add.
min/max/med3 do not flush denormals regardless of the mode,
so it is OK to use it whether or not they are enabled.

Also allow using clamp with f16, and use knowledge
of dx10_clamp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295788 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-21 23:35:48 +00:00
Matt Arsenault
36229b4631 AMDGPU: Formatting fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295783 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-21 22:50:41 +00:00
Matt Arsenault
f2616d2fd3 AMDGPU: Remove llvm.AMDGPU.flbit intrinsic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295754 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-21 19:27:33 +00:00
Matt Arsenault
bcb6a77aca AMDGPU: Don't use stack space for SGPR->VGPR spills 
Before frame offsets are calculated, try to eliminate the
frame indexes used by SGPR spills. Then we can delete them
after.

I think for now we can be sure that no other instruction
will be re-using the same frame indexes. It should be easy
to notice if this assumption ever breaks since everything
asserts if it tries to use a dead frame index later.

The unused emergency stack slot seems to still be left behind,
so an additional 4 bytes is still wasted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295753 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-21 19:12:08 +00:00
Matt Arsenault
83c857cd3a AMDGPU: Merge initial gfx9 support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295554 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-18 18:29:53 +00:00
Matt Arsenault
0f6af2352e AMDGPU: Fix crashes on invalid icmp/fcmp intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295489 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-17 19:49:10 +00:00
Matt Arsenault
81cfbfa738 AMDGPU: Remove llvm.AMDGPU.rsq intrinsic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295358 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-16 19:08:58 +00:00
Matt Arsenault
61239b090d AMDGPU: Remove llvm.SI.sendmsg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295270 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-16 02:01:17 +00:00
Matt Arsenault
a0240d6d1a AMDGPU: Remove SI_fs_constant and SI_fs_interp intrinsics 
Update test uses with expansion in terms of new intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295269 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-16 02:01:13 +00:00
Matt Arsenault
a93bc6c253 AMDGPU: Consolidate sendmsg/sendmsghalt handling and tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295244 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-15 22:17:09 +00:00
Matt Arsenault
dd3604df31 AMDGPU: Fix trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294694 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-10 02:42:31 +00:00
Wei Ding
c75c94d0eb AMDGPU : Add trap handler support. 
Differential Revision: http://reviews.llvm.org/D26010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294692 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-10 02:15:29 +00:00
Matt Arsenault
3b595d2304 AMDGPU: Generalize matching of v_med3_f32 
I think this is safe as long as no inputs are known to ever
be nans.

Also add an intrinsic for fmed3 to be able to handle all safe
math cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293598 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-31 03:07:46 +00:00
Matt Arsenault
f39022545d AMDGPU: Make i32 uaddo/usubo legal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293514 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-30 18:11:38 +00:00
Tom Stellard
1f91c2f5d6 AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel 
Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D29068

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293321 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-27 18:41:14 +00:00
Tom Stellard
d367f44048 AMDGPU add support for spilling to a user sgpr pointed buffers 
Summary:
This lets you select which sort of spilling you want, either s[0:1] or 64-bit loads from s[0:1].

Patch By: Dave Airlie

Reviewers: nhaehnle, arsenm, tstellarAMD

Reviewed By: arsenm

Subscribers: mareko, llvm-commits, kzhuravl, wdng, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D25428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293000 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-25 01:25:13 +00:00
Wei Ding
2e3d9f4dbc AMDGPU : Add trap handler support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292893 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-24 06:41:21 +00:00
Matt Arsenault
50ca9e146b AMDGPU: Custom lower more vector operations 
This avoids stack usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292846 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-23 23:09:58 +00:00
Matt Arsenault
18ea372741 AMDGPU: Remove unnecessary check 
There are no scalar FP types that can be extended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292816 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-23 19:00:15 +00:00
Eugene Zelenko
5751b552da [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292688 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-21 00:53:49 +00:00
Matt Arsenault
62b3258a7c AMDGPU: Add replacement export intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292205 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-17 07:26:53 +00:00
Benjamin Kramer
1fb85c6675 Apply clang-tidy's performance-unnecessary-value-param to LLVM. 
With some minor manual fixes for using function_ref instead of
std::function. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291904 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-13 14:39:03 +00:00
Diana Picus
8a47810cd6 [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 
Rename from addOperand to just add, to match the other method that has been
added to MachineInstrBuilder for adding more than just 1 operand.

See https://reviews.llvm.org/D28057 for the whole discussion.

Differential Revision: https://reviews.llvm.org/D28556

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291891 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-13 09:58:52 +00:00
Matt Arsenault
f7c0d4013c AMDGPU: Add Assert[SZ]Ext during argument load creation 
For i16 zeroext arguments when i16 was a legal type, the
known bits information from the truncate was lost. Insert
a zeroext so the known bits optimizations work with the 32-bit
loads.

Fixes code quality regressions vs. SI in min.ll test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291461 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-09 18:52:39 +00:00
Jan Vesely
0835374acb AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodes 
This will make transition to SCRATCH_MEMORY easier

Differential Revision: https://reviews.llvm.org/D24746

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291279 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-06 21:00:46 +00:00
Jan Vesely
bf64cb107c AMDGPU/SI: Implement sendmsghalt intrinsic 
v2: expose using amdgcn prefix

Differential Revision: https://reviews.llvm.org/D23511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290977 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-01-04 18:06:55 +00:00
Matt Arsenault
ad47821c65 AMDGPU: Use i16 for i16 shift amount 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290351 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 16:36:25 +00:00
Matt Arsenault
8d973070a0 AMDGPU: Use i16 comparison instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290348 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 16:27:11 +00:00
Matt Arsenault
46e5f1c88d AMDGPU: Swap order of operands in fadd/fsub combine 
FMA is canonicalized to constant in the middle operand. Do
the same so fmad matches and avoid an extra combine step.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290313 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 04:03:40 +00:00
Matt Arsenault
121f8654d3 AMDGPU: Check fast math flags in fadd/fsub combines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290312 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 04:03:35 +00:00
Matt Arsenault
ff4096b8f8 AMDGPU: Form more FMAs if fusion is allowed 
Extend the existing fadd/fsub->fmad combines to produce
FMA if allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290311 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:55:35 +00:00
Matt Arsenault
121cd504bf AMDGPU: Move combines into separate functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290309 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:44:42 +00:00
Matt Arsenault
75c32f5150 AMDGPU: Enable some f32 fadd/fsub combines for f16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290308 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:40:39 +00:00
Matt Arsenault
cee1c4614a AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290307 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:21:48 +00:00
Matt Arsenault
a8dff18ebc AMDGPU: Allow rcp and rsq usage with f16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290302 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:05:44 +00:00
Matt Arsenault
4bb99910b0 AMDGPU: Custom lower f16 fdiv 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290301 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:05:41 +00:00
Matt Arsenault
0bb2ef4a14 AMDGPU: Implement f16 fcanonicalize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290300 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-12-22 03:05:37 +00:00