7 Commits

Author SHA1 Message Date
Matt Arsenault
6d62c71357 DAG: Check no signed zeros instead of unsafe math attribute
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297354 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-09 01:36:39 +00:00
Matt Arsenault
8a7ccd7129 AMDGPU: Remove dead declarations in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295757 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-21 19:31:33 +00:00
Matt Arsenault
9291d3c697 DAG: Recognize no-signed-zeros-fp-math attribute
clang already emits this with -cl-no-signed-zeros, but codegen
doesn't do anything with it. Treat it like the other fast math
attributes, and change one place to use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-25 06:08:42 +00:00
Matt Arsenault
5fecfa22e5 AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 21:27:08 +00:00
Matt Arsenault
d707747418 AMDGPU: Run r600 tests last
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268672 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-05 20:07:37 +00:00
Nicolai Haehnle
702b589510 AMDGPU/SI: Fold operands with sub-registers
Summary:
Multi-dword constant loads generated unnecessary moves from SGPRs into VGPRs,
increasing the code size and VGPR pressure. These moves are now folded away.

Note that this lack of operand folding was not a problem for VMEM loads,
because COPY nodes from VReg_Nnn to VGPR32 are eliminated by the register
coalescer.

Some tests are updated, note that the fsub.ll test explicitly checks that
the move is elided.

With the IR generated by current Mesa, the changes are obviously relatively
minor:

7063 shaders in 3531 tests
Totals:
SGPRS: 351872 -> 352560 (0.20 %)
VGPRS: 199984 -> 200732 (0.37 %)
Code Size: 9876968 -> 9881112 (0.04 %) bytes
LDS: 91 -> 91 (0.00 %) blocks
Scratch: 1779712 -> 1767424 (-0.69 %) bytes per wave
Wait states: 295164 -> 295337 (0.06 %)

Totals from affected shaders:
SGPRS: 65784 -> 66472 (1.05 %)
VGPRS: 38064 -> 38812 (1.97 %)
Code Size: 1993828 -> 1997972 (0.21 %) bytes
LDS: 42 -> 42 (0.00 %) blocks
Scratch: 795648 -> 783360 (-1.54 %) bytes per wave
Wait states: 54026 -> 54199 (0.32 %)

Reviewers: tstellarAMD, arsenm, mareko

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15875

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257074 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-07 17:10:29 +00:00
Tom Stellard
953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00