Commit Graph

7 Commits

Author SHA1 Message Date
JF Bastien
13b1346197 WebAssembly: NFC rename shr/sar
Renamed from: https://github.com/WebAssembly/design/pull/332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-08 17:21:21 +00:00
JF Bastien
0118969fbd WebAssembly: emit (func (param t) (result t)) s-expressions
Summary: Match spec format: https://github.com/WebAssembly/spec/blob/master/ml-proto/test/fac.wasm

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D12307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245986 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-25 22:58:05 +00:00
Dan Gohman
c26771d7ab [WebAssembly] Implement the is_zero_undef forms of cttz and ctlz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-24 16:39:37 +00:00
Dan Gohman
6e53cbdf5f [WebAssembly] Use the default alignment for SIMD types.
Previously WebAssembly's datalayout string had -v128:8:128. This had been an
attempt to declare a certain level of support for unaligned SIMD accesses.
However, clang makes its own determinations for SIMD alignment that are
independent of the datalayout string, so this wasn't actually meaningful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245494 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 20:30:20 +00:00
JF Bastien
6d2f2ee4ab WebAssembly: textual emission uses expected opcode names
Summary: WebAssembly's tablegen instructions have the names WebAssembly expects, but by LLVM convention they're uppercase and suffixed with their type after an underscore. Leave the C++ code that way, but print outt he names WebAssembly expects (lowercase, no type). We could teach tablegen to do this later, maybe by using `!cast<string>(node)` in the .td files.

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11776

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-07 01:57:03 +00:00
JF Bastien
5bcfe245f9 WebAssembly: implement getScalarShiftAmountTy so we can shift by amount, with type
Summary: This currently sets the shift amount RHS to the same type as the LHS, and assumes that the LHS is a simple type. This isn't currently the case e.g. with weird integers sizes, but will eventually be true and will assert if not. That's what you get for having an experimental backend: break it and you get to keep both pieces. Most backends either set the RHS to MVT::i32 or MVT::i64, but WebAssembly is a virtual ISA and tries to have regular-looking binary operations where both operands are the same type (even if a 64-bit RHS shifter is slightly silly, hey it's free!).

Subscribers: llvm-commits, sunfish, jfb

Differential Revision: http://reviews.llvm.org/D11715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 00:00:11 +00:00
JF Bastien
e428ba798e WebAssembly: handle more than int32 argument/return
Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-01 04:48:44 +00:00