This patch doesn't create thunk for branch operation when following conditions are met:
- Architecture is AArch64
- Relocation target is in the same object file
- Relocation target is close enough to be encoded in immediate offset
In such case we branch directly to the target instead of branching to thunk
Differential revision: https://reviews.llvm.org/D28108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291431 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: The relocation is missing mask so an address that has non-zero bits in 47:43 may overwrite the register number. (Frequently shows up as target register changed to `xzr`....)
Reviewers: t.p.northover, lhames
Subscribers: davide, aemerson, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D27609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289880 91177308-0d34-0410-b5e6-96231b3b80d8
The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.
Patch by: Daniel Sanders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284724 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This adds the necessary logic to support relocations to thumb functions in the COFF dynamic linker.
The jumps to function addresses are mostly blx, which requires the ISA selection bit when jumping to a thumb function.
Note: I'm determining if the relocation requires the ISA bit when creating the relocation entries and not when resolving the relocation. I have to do that because I need the ObjectFile and the actual Symbol, which are available only when creating the entries. It would require a gross refactor if I do it otherwise, but I'm okay with doing it if you think it's better.
Reviewers: peter.smith, compnerd
Subscribers: rengolin, sas
Differential Revision: https://reviews.llvm.org/D25151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284410 91177308-0d34-0410-b5e6-96231b3b80d8
According to the arm arm specifications, 4 bytes are needed for a shift instead
of 8, this was causing the movt instruction to write to a different register
sometimes.
Patch by Walter Erquinigo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280005 91177308-0d34-0410-b5e6-96231b3b80d8
If there was a tail call, we would incorrectly handle the relocation. It would
end up indexing into the array with an incorrect section id. The symbol was
external to the module, so the Section ID was UNDEFINED (-1). We would then
index the SmallVector with this ID, triggering an assertion. Use the Value
rather than the section load address in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275442 91177308-0d34-0410-b5e6-96231b3b80d8
This adds rudimentary support for COFF ARM to the dynamic loader for the
exeuction engine. This can be used by lldb to JIT code into a COFF ARM
environment. This lays the foundation for the loader, though a few of the
relocation types are yet unhandled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273682 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-mc is a developer tool, as such it make sense for it to use new
features by default.
This doesn't change the user facing clang, which still defaults to non
relaxable relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273014 91177308-0d34-0410-b5e6-96231b3b80d8
Patch by Nitesh Jain.
Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.
Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270542 91177308-0d34-0410-b5e6-96231b3b80d8
Very few things in MC itself use the option. Most of the code that that
uses it could be move to CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269871 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing bots failure. test/ExecutionEngine/RuntimeDyld/SystemZ/cfi-relo-pc64.s
requires SystemZ backend. Mark the test as unsupported if the backend is not
available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269470 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure.
Reviewers: uweigand
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20033
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269436 91177308-0d34-0410-b5e6-96231b3b80d8
This patch switches from an unguarded to a guarded loop for eh-frame record
fixups. In the unguarded version we would always make at least one call to
processFDE, which would then crash trying to fix up a frame that didn't exist.
Fixes <rdar://problem/24301582>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259103 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
For relocation types that are known to not require stub functions, there
is no need to allocate extra space for the stub functions.
Reviewers: lhames, reames, maksfb
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D14676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253920 91177308-0d34-0410-b5e6-96231b3b80d8
This adds support for COFF I386. This is sufficient for code execution in a
32-bit JIT, though, imported symbols need to custom lowered for the redirection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251761 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: ELF's STT_File symbols may overlap with regular globals in
other files, so we should ignore them here in order to avoid having
bogus entries in the symbol table that confuse us when resolving relocations.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D13888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250942 91177308-0d34-0410-b5e6-96231b3b80d8
failing when the suffix was added.
I assume the lack of a '.s' suffix means that the test case just wasn't running
before, and it has never worked on MIPS. I'll investigate that tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250376 91177308-0d34-0410-b5e6-96231b3b80d8
(e.g. bss sections).
MachO and ELF have been silently letting this pass, but COFFObjectFile contains
an assertion to catch this kind of (ab)use of the getSectionContents, and this
was causing the JIT to crash on COFF objects with BSS sections. This patch
should fix that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250371 91177308-0d34-0410-b5e6-96231b3b80d8
This patch adds a test for MIPS64R6 relocations, it corrects check
expressions for R_MIPS_26 and R_MIPS_PC16 relocations in MIPS64R2 test, and
it adds run for big endian in MIPS64R2 test.
Patch by Vladimir Radosavljevic.
Differential Revision: http://reviews.llvm.org/D11217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246311 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This is the correct way to handle JAL instructions when PIC is enabled.
Patch by Toma Tabacu
Reviewers: seanbruno, tomatabacu
Subscribers: brooks, seanbruno, emaste, llvm-commits
Differential Revision: http://reviews.llvm.org/D6231
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245305 91177308-0d34-0410-b5e6-96231b3b80d8
Begin adapting some of the implemented PPC64 relocations for PPC32 (with a
test case).
Patch by Pierre-Andre Saulais!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243991 91177308-0d34-0410-b5e6-96231b3b80d8
Requested by Eugene Rozenfeld of the LLILC team, this feature allows JIT
clients to skip relocations for selected external symbols by returning ~0ULL
from their symbol resolver. If this value is returned for a given symbol,
RuntimeDyld will skip all relocations for that symbol. The client will be
responsible for applying the skipped relocations manually before the code
is executed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241383 91177308-0d34-0410-b5e6-96231b3b80d8
The windows buildbot originally failed because the check expressions are
evaluated as 64-bit values, even for 32-bit symbols. Fixed this by comparing
bottom 32-bits of the expressions.
The host/target endian mismatch issue is that it's invalid to read/write target
values using a host pointer without taking care of endian differences between
the target and host. Most (if not all) instances of
reinterpret_cast<uint32_t*>() in the RuntimeDyld are examples of this bug.
This has been fixed for Mips using the endian aware read/write functions.
The original commits were:
r238838:
[mips] Add RuntimeDyld tests for currently supported O32 relocations.
Reviewers: petarj, vkalintiris
Reviewed By: vkalintiris
Subscribers: vkalintiris, llvm-commits
Differential Revision: http://reviews.llvm.org/D10126
r238844:
[mips][mcjit] Add support for R_MIPS_PC32.
Summary:
This allows us to resolve relocations for DW_EH_PE_pcrel TType encodings
in the exception handling LSDA.
Also fixed a nearby typo.
Reviewers: petarj, vkalintiris
Reviewed By: vkalintiris
Subscribers: vkalintiris, llvm-commits
Differential Revision: http://reviews.llvm.org/D10127
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238915 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
This allows us to resolve relocations for DW_EH_PE_pcrel TType encodings
in the exception handling LSDA.
Also fixed a nearby typo.
Reviewers: petarj, vkalintiris
Reviewed By: vkalintiris
Subscribers: vkalintiris, llvm-commits
Differential Revision: http://reviews.llvm.org/D10127
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238844 91177308-0d34-0410-b5e6-96231b3b80d8
