Commit Graph

6110 Commits

Author SHA1 Message Date
Matthias Braun
15cdf2c20b MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285423 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-28 18:05:09 +00:00
Juergen Ributzka
67d80b9ced Revert "[DAGCombiner] Add vector demanded elements support to computeKnownBits"
This seems to have increased LTO compile time bejond 2x of previous builds.
See http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto/10676/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285381 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-28 04:01:12 +00:00
Simon Pilgrim
5579104d09 [DAGCombiner] Add vector demanded elements support to computeKnownBits
Currently computeKnownBits returns the common known zero/one bits for all elements of vector data, when we may only be interested in one/some of the elements.

This patch adds a DemandedElts argument that allows us to specify the elements we actually care about. The original computeKnownBits implementation calls with a DemandedElts demanding all elements to match current behaviour. Scalar types set this to 1.

The approach was found to be easier than trying to add a per-element known bits solution, for a similar usefulness given the combines where computeKnownBits is typically used.

I've only added support for a few opcodes so far (the ones that have proven straightforward to test), all others will default to demanding all elements but can be updated in due course.

DemandedElts support could similarly be added to computeKnownBitsForTargetNode in a future commit.

Differential Revision: https://reviews.llvm.org/D25691

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285296 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-27 14:29:28 +00:00
Matthias Braun
4e3c65d0e2 MachineInstrBundle: Pass iterators to getBundle(Start|End); NFC
This is a function to go backwards in a block to find the first
instruction in a bundle, so iterator is a more natural choice for
parameter/return rather than a reference to a MachineInstruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285051 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-25 02:55:17 +00:00
Matthias Braun
cc928287e4 CodeGen/Passes: Pass MachineFunction as functor arg; NFC
Passing a MachineFunction as argument is more natural and avoids an
unnecessary round-trip through the logic determining the correct
Subtarget because MachineFunction already has a reference anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285039 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 23:23:02 +00:00
Vedant Kumar
ea1ab92227 [pbqp] unique_ptr-ify (Vector|Matrix)::Data, NFC.
Suggested by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285024 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 20:51:46 +00:00
Vedant Kumar
0ca81d1cb2 [pbqp] Delete some dead code, NFC.
I took the opportunity to replace some copy|move constructors|assignment
operators with default implementations.

As a follow-up, I plan on threading unique_ptr<T []> through a few areas
per David Blaikie's advice.

Differential Revision: https://reviews.llvm.org/D24424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285018 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 20:35:35 +00:00
Peter Collingbourne
80e2a2f817 Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
These functions are about classifying a global which will actually be
emitted, so it does not make sense for them to take a GlobalValue which may
for example be an alias.

Change the Mach-O object writer and the Hexagon, Lanai and MIPS backends to
look through aliases before using TargetLoweringObjectFile interfaces. These
are functional changes but all appear to be bug fixes.

Differential Revision: https://reviews.llvm.org/D25917

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285006 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-24 19:23:39 +00:00
Justin Lebar
6feedc56f7 Remove LLVM_CONSTEXPR.
Summary: With MSVC 2013 and GCC < 4.8 gone, we can use the "constexpr" keyword.

Reviewers: bkramer, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25901

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284947 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-23 19:39:16 +00:00
Konstantin Zhuravlyov
466e9f4bea [MachineMemOperand][AtomicSDNode] Remove getSuccessOrdering()
Differential Revision: https://reviews.llvm.org/D25786


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284834 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-21 16:02:35 +00:00
Benjamin Kramer
cb58e1e3bc Retire llvm::alignOf in favor of C++11 alignof.
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284733 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-20 15:02:18 +00:00
Benjamin Kramer
06d5a1641d Do a sweep over move ctors and remove those that are identical to the default.
All of these existed because MSVC 2013 was unable to synthesize default
move ctors. We recently dropped support for it so all that error-prone
boilerplate can go.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284721 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-20 12:20:28 +00:00
Tim Northover
96f32a0e61 Revert r284604. A.K.A. "TMP"
Committed by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284606 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-19 15:56:12 +00:00
Tim Northover
ef2c5dd55c TMP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284604 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-19 15:55:09 +00:00
Tim Northover
4841e615e3 GlobalISel: translate memcpy intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284525 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-18 20:03:45 +00:00
Sanjay Patel
8a2a445fa8 [DAG] make isConstOrConstSplat and isConstOrConstSplatFP more accessible; NFC
As noted in:
https://reviews.llvm.org/D25685

This is the next-to-smallest step needed to enable the ComputeNumSignBits fix in that patch. 
In a minor attempt to keep some structure, we're pulling the FP helper over along with its
integer sibling, but clearly we can and should do more refactoring of the similar helper
functions in DAGCombiner and SelectionDAG to simplify and not duplicate functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284421 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-17 20:26:46 +00:00
Justin Bogner
215b6d51e1 MachineModuleInfo: Prefer the LLVM_NODISCARD spelling
Update a function annotated with LLVM_ATTRIBUTE_UNUSED_RESULT to use
LLVM_NODISCARD instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284346 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-16 21:18:26 +00:00
Konstantin Zhuravlyov
a7e2c08af2 [MachineMemOperand] Move synchronization scope and atomic orderings from SDNode to MachineMemOperand, and remove redundant getAtomic* member functions from SelectionDAG.
Differential Revision: https://reviews.llvm.org/D24577


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284312 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-15 22:01:18 +00:00
Tim Northover
ee325b9e96 GlobalISel: rename legalizer components to match others.
The previous names were both misleading (the MachineLegalizer actually
contained the info tables) and inconsistent with the selector & translator (in
having a "Machine") prefix. This should make everything sensible again.

The only functional change is the name of a couple of command-line options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284287 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-14 22:18:18 +00:00
Nicolai Haehnle
9b219839bc Fix use-after-frees
Extracted from D25313, as suggested by Justin Bogner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284220 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-14 09:49:51 +00:00
Krzysztof Parzyszek
6dcccf4d12 Handle lane masks in LivePhysRegs when adding live-ins
Differential Revision: https://reviews.llvm.org/D25533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284076 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 22:53:41 +00:00
Albert Gutowski
16bf208ba8 Create llvm.addressofreturnaddress intrinsic
Summary: We need a new LLVM intrinsic to implement MS _AddressOfReturnAddress builtin on 64-bit Windows.

Reviewers: majnemer, rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284061 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 22:13:19 +00:00
Haicheng Wu
b893afb0a5 Reapply "[LoopUnroll] Use the upper bound of the loop trip count to fullly unroll a loop"
Reappy r284044 after revert in r284051. Krzysztof fixed the error in r284049.

The original summary:

This patch tries to fully unroll loops having break statement like this

for (int i = 0; i < 8; i++) {
    if (a[i] == value) {
        found = true;
        break;
    }
}

GCC can fully unroll such loops, but currently LLVM cannot because LLVM only
supports loops having exact constant trip counts.

The upper bound of the trip count can be obtained from calling
ScalarEvolution::getMaxBackedgeTakenCount(). Part of the patch is the
refactoring work in SCEV to prevent duplicating code.

The feature of using the upper bound is enabled under the same circumstance
when runtime unrolling is enabled since both are used to unroll loops without
knowing the exact constant trip count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284053 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 21:29:38 +00:00
Haicheng Wu
3d05abfa85 Revert "[LoopUnroll] Use the upper bound of the loop trip count to fullly unroll a loop"
This reverts commit r284044.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284051 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 21:02:22 +00:00
Haicheng Wu
6ceda533e5 [LoopUnroll] Use the upper bound of the loop trip count to fullly unroll a loop
This patch tries to fully unroll loops having break statement like this

for (int i = 0; i < 8; i++) {
    if (a[i] == value) {
        found = true;
        break;
    }
}

GCC can fully unroll such loops, but currently LLVM cannot because LLVM only
supports loops having exact constant trip counts.

The upper bound of the trip count can be obtained from calling
ScalarEvolution::getMaxBackedgeTakenCount(). Part of the patch is the
refactoring work in SCEV to prevent duplicating code.

The feature of using the upper bound is enabled under the same circumstance
when runtime unrolling is enabled since both are used to unroll loops without
knowing the exact constant trip count.

Differential Revision: https://reviews.llvm.org/D24790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-12 20:24:32 +00:00
Kyle Butt
2a18018c10 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well. Issue was worklist/scheduling/taildup issue in layout.

Issue from 2nd rollback fixed, with 2 additional tests. Issue was
tail merging/loop info/tail-duplication causing issue with loops that share
a header block.

Issue with early tail-duplication of blocks that branch to a fallthrough
predecessor fixed with test case: tail-dup-branch-to-fallthrough.ll

Differential revision: https://reviews.llvm.org/D18226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283934 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 20:36:43 +00:00
Daniel Jasper
ebc8a28377 Revert "Codegen: Tail-duplicate during placement."
This reverts commit r283842.

test/CodeGen/X86/tail-dup-repeat.ll causes and llc crash with our
internal testing. I'll share a link with you.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283857 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 07:36:11 +00:00
Matthias Braun
8ee2011aa7 MIRParser: Rewrite register info initialization; mostly NFC
This changes MachineRegisterInfo to be initializes after parsing all
instructions. This is in preparation for upcoming commits that allow the
register class specification on the operand or deduce them from the
MCInstrDesc.

This commit removes the unused feature of having nonsequential register
numbers. This was confusing anyway as the vreg numbers would be
different after parsing when you had "holes" in your numbering.

This patch also introduces the concept of an incomplete virtual
register. An incomplete virtual register may be used during .mir parsing
to construct MachineOperands without knowing the exact register class
(or register bank) yet.

NFC except for some error messages.

Differential Revision: https://reviews.llvm.org/D22397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283848 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 03:13:01 +00:00
Kyle Butt
be53d7c9c4 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well. Issue was worklist/scheduling/taildup issue in layout.

Issue from 2nd rollback fixed, with 2 additional tests. Issue was
tail merging/loop info/tail-duplication causing issue with loops that share
a header block.

Issue with early tail-duplication of blocks that branch to a fallthrough
predecessor fixed with test case: tail-dup-branch-to-fallthrough.ll

Differential revision: https://reviews.llvm.org/D18226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283842 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-11 01:20:33 +00:00
Elena Demikhovsky
23bd7de392 DAG: Setting Masked-Expand-Load as a variant of Masked-Load node
Masked-expand-load node represents load operation that loads a variable amount of elements from memory according to amount of "true" bits in the mask and expands the loaded elements according to their position in the mask vector.
Right now, the node is used in intrinsics for VEXPAND* instructions. 
The work is done towards implementation of masked.expandload and masked.compressstore intrinsics.

Differential Revision: https://reviews.llvm.org/D25322



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283694 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-09 10:48:52 +00:00
Mehdi Amini
3ffe113e11 Turn cl::values() (for enum) from a vararg function to using C++ variadic template
The core of the change is supposed to be NFC, however it also fixes
what I believe was an undefined behavior when calling:

 va_start(ValueArgs, Desc);

with Desc being a StringRef.

Differential Revision: https://reviews.llvm.org/D25342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283671 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 19:41:06 +00:00
Kyle Butt
473ebca2dd Revert "Codegen: Tail-duplicate during placement."
This reverts commit 71c312652c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283647 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-08 01:47:05 +00:00
Kyle Butt
71c312652c Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well. Issue was worklist/scheduling/taildup issue in layout.

Issue from 2nd rollback fixed, with 2 additional tests. Issue was
tail merging/loop info/tail-duplication causing issue with loops that share
a header block.

Differential revision: https://reviews.llvm.org/D18226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 22:33:20 +00:00
Arnold Schwaighofer
c4f04d9726 swifterror: Don't compute swifterror vregs during instruction selection
The code used llvm basic block predecessors to decided where to insert phi
nodes. Instruction selection can and will liberally insert new machine basic
block predecessors. There is not a guaranteed one-to-one mapping from pred.
llvm basic blocks and machine basic blocks.

Therefore the current approach does not work as it assumes we can mark
predecessor machine basic block as needing a copy, and needs to know the set of
all predecessor machine basic blocks to decide when to insert phis.

Instead of computing the swifterror vregs as we select instructions, propagate
them at the end of instruction selection when the MBB CFG is complete.

When an instruction needs a swifterror vreg and we don't know the value yet,
generate a new vreg and remember this "upward exposed" use, and reconcile this
at the end of instruction selection.

This will only happen if the target supports promoting swifterror parameters to
registers and the swifterror attribute is used.

rdar://28300923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-07 22:06:55 +00:00
Vedant Kumar
4a0edca8c6 Delete some dead code in SelectionDAG (NFC)
Differential Revision: https://reviews.llvm.org/D24435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283505 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-06 22:53:43 +00:00
Matt Arsenault
c205b62417 Move AArch64BranchRelaxation to generic code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283459 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-06 15:38:53 +00:00
David Callahan
8be61a8c7e Modify df_iterator to support post-order actions
Summary: This makes a change to the state used to maintain visited information for depth first iterator. We know assume a method "completed(...)" which is called after all children of a node have been visited. In all existing cases, this method does nothing so this patch has no functional changes.  It will however allow a client to distinguish back from cross edges in a DFS tree.

Reviewers: nadav, mehdi_amini, dberlin

Subscribers: MatzeB, mzolotukhin, twoh, freik, llvm-commits

Differential Revision: https://reviews.llvm.org/D25191

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283391 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 21:36:16 +00:00
Peter Collingbourne
81c297eebe FastISel: Remove unused/un-overridden entry points. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283366 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 19:25:20 +00:00
Kyle Butt
d03fefcc5e Revert "Codegen: Tail-duplicate during placement."
This reverts commit 062ace9764.

Issue with loop info and block removal revealed by polly.
I have a fix for this issue already in another patch, I'll re-roll this
together with that fix, and a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283292 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 01:39:29 +00:00
Mehdi Amini
bc4286d9e7 Use StringRef in FastISel API (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283291 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-05 01:37:29 +00:00
Kyle Butt
062ace9764 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well.

Differential revision: https://reviews.llvm.org/D18226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283274 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 23:54:18 +00:00
Sanjay Patel
b60ab5d110 [Target] move reciprocal estimate settings from TargetOptions to TargetLowering
The motivation for the change is that we can't have pseudo-global settings for
codegen living in TargetOptions because that doesn't work with LTO.

Ideally, these reciprocal attributes will be moved to the instruction-level via
FMF, metadata, or something else. But making them function attributes is at least
an improvement over the current state.

The ingredients of this patch are:

    Remove the reciprocal estimate command-line debug option.
    Add TargetRecip to TargetLowering.
    Remove TargetRecip from TargetOptions.
    Clean up the TargetRecip implementation to work with this new scheme.
    Set the default reciprocal settings in TargetLoweringBase (everything is off).
    Update the PowerPC defaults, users, and tests.
    Update the x86 defaults, users, and tests.

Note that if this patch needs to be reverted, the related clang patch checked in
at r283251 should be reverted too.

Differential Revision: https://reviews.llvm.org/D24816



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283252 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 20:46:43 +00:00
Sjoerd Meijer
a074ac8dd7 Consistent fp denormal mode names. NFC.
This fixes the inconsistency of the fp denormal option names: in LLVM this was
DenormalType, but in Clang this is DenormalMode which seems better.

Differential Revision: https://reviews.llvm.org/D24906


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283192 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 08:03:36 +00:00
Kyle Butt
77893035df Revert "Codegen: Tail-duplicate during placement."
This reverts commit ff234efbe2.

Causing crashes on aarch64 build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283172 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 00:38:23 +00:00
Kyle Butt
ff234efbe2 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283164 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-04 00:00:09 +00:00
Mehdi Amini
b7d8ee46b4 Use StringRef in CommandLine Options handling (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283007 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-01 03:43:20 +00:00
Mehdi Amini
798a8cd196 Use StringRef instead of raw pointer in MachinePassRegistry (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283006 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-01 03:19:41 +00:00
Mehdi Amini
67f335d992 Use StringRef in Pass/PassManager APIs (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283004 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-01 02:56:57 +00:00
Eric Christopher
26e89a710f Remove getTargetTriple and update all uses to use the Triple off
of the TargetMachine. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283002 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-01 01:50:33 +00:00
Matthias Braun
abc1d2159c ScheduleDAGInstrs: There is no need to set OrigNode for MI SUnits; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282666 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-29 01:32:31 +00:00