Commit Graph

1415 Commits

Author SHA1 Message Date
Weiming Zhao
7420263227 DAG: avoid duplicated truncating for sign extended operand
Summary:
When performing cmp for EQ/NE and the operand is sign extended, we can
avoid the truncaton if the bits to be tested are no less than origianl
bits.

Reviewers: eli.friedman

Subscribers: eli.friedman, aemerson, nemanjai, t.p.northover, llvm-commits

Differential Revision: https://reviews.llvm.org/D22933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277252 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-29 23:33:48 +00:00
Matthias Braun
e3d8cd87b2 Revert "RegScavenging: Add scavengeRegisterBackwards()"
Reverting this commit for now as it seems to be causing failures on
test-suite tests on the clang-ppc64le-linux-lnt bot.

This reverts commit r276044.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-20 00:21:32 +00:00
Matthias Braun
c5e14e0478 RegScavenging: Add scavengeRegisterBackwards()
This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:37:09 +00:00
Nemanja Ivanovic
fe4ad6d3ea [PowerPC] Remove redundant direct moves when extracting integers and converting to FP
This patch corresponds to review:
https://reviews.llvm.org/D21354

We use direct moves for extracting integer elements from vectors. We also use
direct moves when converting integers to FP. When these operations are chained,
we get a direct move out of a VSR followed by a direct move back into a VSR.
These are redundant - all we need to do is line up the element and convert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275796 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-18 15:30:00 +00:00
Quentin Colombet
3d35f0d482 [MIR] Print on the given output instead of stderr.
Currently the MIR framework prints all its outputs (errors and actual
representation) on stderr.

This patch fixes that by printing the regular output in the output
specified with -o.

Differential Revision: http://reviews.llvm.org/D22251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275314 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-13 20:36:03 +00:00
Nemanja Ivanovic
be82bf917e The test case I added is PowerPC specific but I accidentally
had it in the wrong directory. Moved it to CodeGen/PowerPC.

Sorry about the noise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275218 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 21:24:08 +00:00
Nemanja Ivanovic
695eea88e9 [PowerPC] Cannonicalize applicable vector shift immediates as swaps
This patch corresponds to review:
http://reviews.llvm.org/D21358

Vector shifts that have the same semantics as a vector swap are cannonicalized
as such to provide additional opportunities for swap removal optimization to
remove unnecessary swaps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275168 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 12:16:27 +00:00
Matthias Braun
79519fecc3 VirtRegMap: Replace some identity copies with KILL instructions.
An identity COPY like this:
   %AL = COPY %AL, %EAX<imp-def>
has no semantic effect, but encodes liveness information: Further users
of %EAX only depend on this instruction even though it does not define
the full register.

Replace the COPY with a KILL instruction in those cases to maintain this
liveness information. (This reverts a small part of r238588 but this
time adds a comment explaining why a KILL instruction is useful).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274952 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-09 00:19:07 +00:00
Matt Arsenault
a3314a5719 PeepholeOptimizer: Make pass name match DEBUG_TYPE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274874 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 16:29:11 +00:00
Kit Barton
d1168ef803 Ensure all uses of permute instructions feed vector stores
There is a problem in VSXSwapRemoval where it is incorrectly removing permute instructions.
In this case, the permute is feeding both a vector store and also a non-store instruction. In this case, the permute cannot be removed.

The fix is to simply look at all the uses of the vector register defined by the permute and ensure that all the uses are vector store instructions.

This problem was reported in PR 27735 (https://llvm.org/bugs/show_bug.cgi?id=27735).

Test case based on the original problem reported.

Phabricator Review: http://reviews.llvm.org/D21802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274645 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-06 18:03:52 +00:00
Tim Shen
0cb64ba25c [DAGCombiner] Fix visitSTORE to continue processing current SDNode, if findBetterNeighborChains doesn't actually CombineTo it.
Summary:
findBetterNeighborChains may or may not find a better chain for each node it finds, which include the node ("St") that visitSTORE is currently processing. If no better chain is found for St, visitSTORE should continue instead of return SDValue(St, 0), as if it's CombinedTo'ed.

This fixes bug 28130. There might be other ways to make the test pass (see D21409). I think both of the patches are fixing actual bugs revealed by the same testcase.

Reviewers: echristo, wschmidt, hfinkel, kbarton, amehsan, arsenm, nemanjai, bogner

Subscribers: mehdi_amini, nemanjai, llvm-commits

Differential Revision: http://reviews.llvm.org/D21692

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274644 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-06 17:44:03 +00:00
Nemanja Ivanovic
ba988eb430 [PowerPC] - Legalize vector types by widening instead of integer promotion
This patch corresponds to review:
http://reviews.llvm.org/D20443

It changes the legalization strategy for illegal vector types from integer
promotion to widening. This only applies for vectors with elements of width
that is a multiple of a byte since we have hardware support for vectors with
1, 2, 3, 8 and 16 byte elements.
Integer promotion for vectors is quite expensive on PPC due to the sequence
of breaking apart the vector, extending the elements and reconstituting the
vector. Two of these operations are expensive.
This patch causes between minor and major improvements in performance on most
benchmarks. There are very few benchmarks whose performance regresses. These
regressions can be handled in a subsequent patch with a DAG combine (similar
to how this patch handles int -> fp conversions of illegal vector types).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274535 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-05 09:22:29 +00:00
Rafael Espindola
6264e53456 Update tests to use at least darwin9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274129 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-29 14:51:10 +00:00
Matthias Braun
f011e37181 MachineScheduler: Fully compare top/bottom candidates
In bidirectional scheduling this gives more stable results than just
comparing the "reason" fields of the top/bottom node because the reason
field may be higher depending on what other nodes are in the queue.

Differential Revision: http://reviews.llvm.org/D19401

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273755 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-25 00:23:00 +00:00
Rafael Espindola
205ddae3d3 Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-23 20:37:49 +00:00
Artur Pilipenko
525757e9f7 Upgrade other old memset/memcpy signatures in tests causing buildbot failures with rL273568.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273580 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-23 16:34:52 +00:00
Rafael Espindola
bf7782c956 Use shouldAssumeDSOLocal.
With this it handle -fPIE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273499 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-22 22:09:17 +00:00
Peter Collingbourne
63b34cdf34 IR: Introduce local_unnamed_addr attribute.
If a local_unnamed_addr attribute is attached to a global, the address
is known to be insignificant within the module. It is distinct from the
existing unnamed_addr attribute in that it only describes a local property
of the module rather than a global property of the symbol.

This attribute is intended to be used by the code generator and LTO to allow
the linker to decide whether the global needs to be in the symbol table. It is
possible to exclude a global from the symbol table if three things are true:
- This attribute is present on every instance of the global (which means that
  the normal rule that the global must have a unique address can be broken without
  being observable by the program by performing comparisons against the global's
  address)
- The global has linkonce_odr linkage (which means that each linkage unit must have
  its own copy of the global if it requires one, and the copy in each linkage unit
  must be the same)
- It is a constant or a function (which means that the program cannot observe that
  the unique-address rule has been broken by writing to the global)

Although this attribute could in principle be computed from the module
contents, LTO clients (i.e. linkers) will normally need to be able to compute
this property as part of symbol resolution, and it would be inefficient to
materialize every module just to compute it.

See:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160509/356401.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160516/356738.html
for earlier discussion.

Part of the fix for PR27553.

Differential Revision: http://reviews.llvm.org/D20348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272709 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-14 21:01:22 +00:00
Diana Picus
7845b7dd45 [SelectionDAG] Remove exit-on-error flag from test (PR27765)
The exit-on-error flag in the ARM test is necessary in order to avoid an
unreachable in the DAGTypeLegalizer, when trying to expand a physical register.
We can also avoid this situation by introducing a bitcast early on, where the
invalid scalar-to-vector conversion is detected.

We also add a test for PowerPC, which goes through a similar code path in the
SelectionDAGBuilder.

Fixes PR27765.

Differential Revision: http://reviews.llvm.org/D21061

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272644 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-14 07:30:20 +00:00
Strahinja Petrovic
7417e35311 This patch fixes handling long double type when it is
constant in soft float mode on PowerPC 32 architecture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272543 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-13 10:29:29 +00:00
Eric Christopher
7da58e6313 Add aliases for mfvrsave/mtvrsave.
Update a test as we're now going to emit it for easier reading of
generated assembly as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-09 23:27:48 +00:00
Ulrich Weigand
d7ad443387 [PowerPC] Support multiple return values with fast isel
Using an LLVM IR aggregate return value type containing three
or more integer values causes an abort in the fast isel pass.

This patch adds two more registers to RetCC_PPC64_ELF_FIS to
allow returning up to four integers with fast isel, just the
same as is currently supported with regular isel (RetCC_PPC).

This is needed for Swift and (possibly) other non-clang frontends.

Fixes PR26190.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272005 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-07 12:48:22 +00:00
Geoff Berry
a6b49a045b [PowerPC] Run reg2mem on tests to simplify them.
Summary:
Also convert test/CodeGen/PowerPC/vsx-ldst-builtin-le.ll to use
FileCheck instead of two grep and count runs.

This change is needed to avoid spurious diffs in these tests when
EarlyCSE is improved to use MemorySSA and can do more load elimination.

Reviewers: hfinkel

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20238

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271553 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-02 18:02:50 +00:00
Keno Fischer
aec5010b27 [PPC64] Fix SUBFC8 Defs list
Fix PR27943 "Bad machine code: Using an undefined physical register".
SUBFC8 implicitly defines the CR0 register, but this was omitted in
the instruction definition.

Patch by Jameson Nash <jameson@juliacomputing.com>

Reviewers: hfinkel
Differential Revision: http://reviews.llvm.org/D20802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271425 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-01 20:31:07 +00:00
Tim Shen
06c03e5705 Move and add comments to the top for tailcall-string-rvo.ll
Differential Revision: http://reviews.llvm.org/D20311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270722 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-25 17:01:09 +00:00
Tim Shen
258d886f61 [PowerPC] Add a testcase for TCO on string rvo function
Differential Revision: http://reviews.llvm.org/D20311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270287 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 22:42:01 +00:00
Rafael Espindola
f5a1debd28 Simplify handling of hidden stubs on PowerPC.
We now handle them just like non hidden ones. This was already the case
on x86 (r207518) and arm (r207517).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270205 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-20 12:00:52 +00:00
Rafael Espindola
214e8d3f06 Don't pass relocation-model= to tests that don't need it.
Very few things in MC itself use the option. Most of the code that that
uses it could be move to CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269871 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-18 00:27:17 +00:00
Renato Golin
cd41a78559 Fix an assert in SelectionDAGBuilder when processing inline asm
When processing inline asm that contains errors, make sure we can recover
gracefully by creating an UNDEF SDValue for the inline asm statement before
returning from SelectionDAGBuilder::visitInlineAsm. This is necessary for
consumers that don't exit on the first error that is emitted (e.g. clang)
and that would assert later on.

Fixes PR24071.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269811 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-17 19:52:01 +00:00
Rafael Espindola
0d4db7017f Add a test showing how hidden stubs are handled on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269766 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-17 14:24:33 +00:00
Renato Golin
3b0d377ef8 [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Reapplied after fixing the LLDB build that was broken due to the new
DiagnosticSeverity in LLVMContext.h, and fixed an UB in the new change.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269655 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-16 14:28:02 +00:00
Renato Golin
7e38263edc Revert "[llc] New diagnostic handler"
This reverts commit r269563. Even though now it passes all LLDB bots
after a local fix, there's a new buildbot it fails with tests that we
hadn't seen locally:

http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/15647

Adding those tests to the list to investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269568 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 14:37:11 +00:00
Renato Golin
2c05d88b8d [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Reapplied after fixing the LLDB build that was broken due to the new
DiagnosticSeverity in LLVMContext.h.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269563 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-14 13:15:22 +00:00
Renato Golin
865778e04a Revert "[llc] New diagnostic handler"
This reverts commit r269428, as it breaks the LLDB build. We need to
understand how to change LLDB in the same way as LLC before landing this
again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269432 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 16:02:44 +00:00
Renato Golin
89ca6c01c0 [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Patch by Diana Picus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269428 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 15:37:46 +00:00
Hal Finkel
db6adcba1e [PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc
While promoting nodes in PPCTargetLowering::DAGCombineExtBoolTrunc, it is
possible for one of the nodes to be replaced by another. To make sure we do not
visit the deleted nodes, and to make sure we visit the replacement nodes, use a
list of HandleSDNodes to track the to-be-promoted nodes during the promotion
process.

The same fix has been applied to the analogous code in
PPCTargetLowering::DAGCombineTruncBoolExt.

Fixes PR26985.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269272 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-12 04:00:56 +00:00
Rafael Espindola
11ab0c3a5d Make "@name =" mandatory for globals in .ll files.
An oddity of the .ll syntax is that the "@var = " in

@var = global i32 42

is optional. Writing just

global i32 42

is equivalent to

@0 = global i32 42

This means that there is a pretty big First set at the top level. The
current implementation maintains it manually. I was trying to refactor
it, but then started wondering why keep it a all. I personally find the
above syntax confusing. It looks like something is missing.

This patch removes the feature and simplifies the parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269096 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-10 18:22:45 +00:00
Nemanja Ivanovic
f9018a1eb7 [Power9] Add support for -mcpu=pwr9 in the back end
This patch corresponds to review:
http://reviews.llvm.org/D19683

Simply adds the bits for being able to specify -mcpu=pwr9 to the back end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268950 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-09 18:54:58 +00:00
Strahinja Petrovic
a16fdea51a [PowerPC] fix register alignment for long double type
This patch fixes register alignment for long double type in
soft float mode. Before this patch alignment was 8 and this
patch changes it to 4.
Differential Revision: http://reviews.llvm.org/D18034



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-09 12:27:39 +00:00
Nemanja Ivanovic
990ef3411f [PowerPC] Generate VSX version of splat word
This patch corresponds to review:
http://reviews.llvm.org/D18592

It allows the PPC back end to generate the xxspltw instruction where we
previously only emitted vspltw.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268516 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 16:04:02 +00:00
Haicheng Wu
0583545372 [MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.
Fix a FIXME.  Disable loop alignment if compiled with -Oz now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268121 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 22:01:10 +00:00
Guozhi Wei
d707220214 [PPC] Enable shuffling of VSX vectors
This patch fixes PR27078 by enabling shuffling of vectors if VSX is available.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268064 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-29 17:00:54 +00:00
Marcin Koscielnicki
b527cb338d [PowerPC] Fix the EH_SjLj_Setup pseudo.
This instruction is just a control flow marker - it should not
actually exist in the object file.  Unfortunately, nothing catches
it before it gets to AsmPrinter.  If integrated assembler is used,
it's considered to be a normal 4-byte instruction, and emitted as
an all-0 word, crashing the program.  With external assembler,
a comment is emitted.

Fixed by setting Size to 0 and handling it in MCCodeEmitter - this
means the comment will still be emitted if integrated assembler
is not used.

This broke an ASan test, which has been disabled for a long time
as a result (see the discussion on D19657).  We can reenable it
once this lands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267943 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-28 21:24:37 +00:00
Chuang-Yu Cheng
4bbf2a928e [ppc64] fix bug in prologue that mfocrf's cr operand should be explict state instead of implicit
This fixes PR27414

Reviewers: kbarton mgrang tjablin

http://reviews.llvm.org/D19255

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267660 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-27 02:59:28 +00:00
Marcin Koscielnicki
adc800c659 [PowerPC] Add support for llvm.thread.pointer
Differential Revision: http://reviews.llvm.org/D19304

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267546 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-26 10:37:22 +00:00
Marcin Koscielnicki
e7311dc60e [PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
visitAND, when folding and (load) forgets to check which output of
an indexed load is involved, happily folding the updated address
output on the following testcase:

target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"

%typ = type { i32, i32 }

define signext i32 @_Z8access_pP1Tc(%typ* %p, i8 zeroext %type) {
  %b = getelementptr inbounds %typ, %typ* %p, i64 0, i32 1
  %1 = load i32, i32* %b, align 4
  %2 = ptrtoint i32* %b to i64
  %3 = and i64 %2, -35184372088833
  %4 = inttoptr i64 %3 to i32*
  %_msld = load i32, i32* %4, align 4
  %zzz = add i32 %1,  %_msld
  ret i32 %zzz
}

Fix this by checking ResNo.

I've found a few more places that currently neglect to check for
indexed load, and tightened them up as well, but I don't have test
cases for them.  In fact, they might not be triggerable at all,
at least with current targets.  Still, better safe than sorry.

Differential Revision: http://reviews.llvm.org/D19202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267420 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 15:43:44 +00:00
Marcin Koscielnicki
c627cc351a [PowerPC] [PR27387] Disallow r0 for ADD8TLS.
ADD8TLS, a variant of add instruction used for initial-exec TLS,
currently accepts r0 as a source register.  While add itself supports
r0 just fine, linker can relax it to a local-exec sequence, converting
it to addi - which doesn't support r0.

Differential Revision: http://reviews.llvm.org/D19193

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267388 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 09:24:34 +00:00
Sanjay Patel
d993f1c024 use FileCheck; add test for disguised fabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267051 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-21 20:58:58 +00:00
Marcin Koscielnicki
8ac661cafb [PowerPC] [SSP] Fix stack guard load for 32-bit.
r266809 incorrectly used LD to load the stack guard, it should be LWZ.

Differential Revision: http://reviews.llvm.org/D19358

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267017 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-21 17:36:05 +00:00
Mandeep Singh Grang
2599294457 [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
Summary: Removed unwanted --check-prefix=CHECK from numerous unit tests.

Reviewers: t.p.northover, dblaikie, uweigand, MatzeB, tstellarAMD, mcrosier

Subscribers: mcrosier, dsanders

Differential Revision: http://reviews.llvm.org/D19279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266834 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-19 23:51:52 +00:00