Sam Kolton 06ed4a14fd [AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions ...

Summary:
1. Instruction V_CVT_U32_F32 allow omod operand (see SIInstrInfo.td:1435). In fact this operand shouldn't be allowed here. This fix checks if SDWA pseudo instruction has OMod operand and then copy it.
2. There were several problems with support of VOPC instructions in SDWA peephole pass.

Reviewers: tstellar, arsenm, vpykhtin, airlied, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, dstuttard, tpr, sarnex, t-tye

Differential Revision: https://reviews.llvm.org/D34626

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306413 91177308-0d34-0410-b5e6-96231b3b80d8

2017-06-27 15:02:23 +00:00

..

AMDGPUDisassembler.cpp

[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions

2017-06-27 15:02:23 +00:00

AMDGPUDisassembler.h

[AMDGPU] SDWA: merge VI and GFX9 pseudo instructions

2017-06-21 08:53:38 +00:00

CMakeLists.txt

[AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.

2016-05-26 17:00:33 +00:00

LLVMBuild.txt

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