Tim Northover 8cc396e7aa ARM: handle post-indexed NEON ops where the offset isn't the access width. ...

Before, we assumed that any ConstantInt offset was precisely the access width,
so we could use the "[rN]!" form. ISelLowering only ever created that kind, but
further simplification during combining could lead to unexpected constants and
incorrect codegen.

Should fix PR32658.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300878 91177308-0d34-0410-b5e6-96231b3b80d8

2017-04-20 19:54:02 +00:00

..

2012-06-15-lsr-noaddrmode.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

2015-02-27 21:17:42 +00:00

addrec-is-loop-invariant.ll

[ARM] Loop Strength Reduction crashes when targeting ARM or Thumb.

2016-11-09 08:53:07 +00:00

ivchain-ARM.ll

ARM: handle post-indexed NEON ops where the offset isn't the access width.

2017-04-20 19:54:02 +00:00

lit.local.cfg

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