Aditya Nandakumar c7c608fe5e [GISel]: Add G_FMA opcode for fused multiply adds ...

https://reviews.llvm.org/D34372

Reviewed by dsanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305824 91177308-0d34-0410-b5e6-96231b3b80d8

2017-06-20 19:25:23 +00:00

..

CallLowering.cpp

[IR] Abstract away ArgNo+1 attribute indexing as much as possible

2017-05-03 18:17:31 +00:00

CMakeLists.txt

Prune trailing whitespace. (To regenerate makefiles)

2017-05-28 22:54:25 +00:00

GlobalISel.cpp

[GlobalISel] Add a localizer pass for target to use

2017-05-27 01:34:00 +00:00

InstructionSelect.cpp

ARM: Compute MaxCallFrame size early

2017-05-05 22:04:05 +00:00

InstructionSelector.cpp

[globalisel][tablegen] Add support for COPY_TO_REGCLASS.

2017-06-20 12:36:34 +00:00

IRTranslator.cpp

[GISel]: Add G_FMA opcode for fused multiply adds

2017-06-20 19:25:23 +00:00

Legalizer.cpp

[GlobalISel] combine not symmetric merge/unmerge nodes.

2017-06-20 08:54:17 +00:00

LegalizerHelper.cpp

[ARM] GlobalISel: Add support for i32 modulo

2017-06-15 10:53:31 +00:00

LegalizerInfo.cpp

[GISel]: Fix undefined behavior while accessing DefaultAction map

2017-05-12 22:43:58 +00:00

LLVMBuild.txt

Revert "Get GlobalISel to build on Linux after r286407"

2016-11-16 22:24:59 +00:00

Localizer.cpp

[Localizer] Don't trick to be smart for the insertion point

2017-05-30 20:53:06 +00:00

MachineIRBuilder.cpp

[globalisel][legalizer] G_LOAD/G_STORE NarrowScalar should not emit G_GEP x, 0.

2017-06-13 23:42:32 +00:00

RegBankSelect.cpp

[RegisterBankInfo] Remove overly-agressive asserts

2017-05-15 09:52:33 +00:00

RegisterBank.cpp

Move size and alignment information of regclass to TargetRegisterInfo

2017-04-24 18:55:33 +00:00

RegisterBankInfo.cpp

[RegisterBankInfo] Uniquely allocate instruction mapping.

2017-05-05 22:48:22 +00:00

Utils.cpp

[globalisel][tablegen] Add support for COPY_TO_REGCLASS.

2017-06-20 12:36:34 +00:00