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d019e8638a
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292982 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
3.0 KiB
LLVM
70 lines
3.0 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; The bitcast should be pushed through the bitcasts so the vectors can
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; be broken down and the shared components can be CSEd
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; GCN-LABEL: {{^}}store_bitcast_constant_v8i32_to_v8f32:
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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define void @store_bitcast_constant_v8i32_to_v8f32(<8 x float> addrspace(1)* %out, <8 x i32> %vec) {
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%vec0.bc = bitcast <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 8> to <8 x float>
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store volatile <8 x float> %vec0.bc, <8 x float> addrspace(1)* %out
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%vec1.bc = bitcast <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 9> to <8 x float>
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store volatile <8 x float> %vec1.bc, <8 x float> addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}store_bitcast_constant_v4i64_to_v8f32:
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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define void @store_bitcast_constant_v4i64_to_v8f32(<8 x float> addrspace(1)* %out, <4 x i64> %vec) {
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%vec0.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 8> to <8 x float>
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store volatile <8 x float> %vec0.bc, <8 x float> addrspace(1)* %out
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%vec1.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 9> to <8 x float>
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store volatile <8 x float> %vec1.bc, <8 x float> addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}store_bitcast_constant_v4i64_to_v4f64:
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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define void @store_bitcast_constant_v4i64_to_v4f64(<4 x double> addrspace(1)* %out, <4 x i64> %vec) {
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%vec0.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 8> to <4 x double>
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store volatile <4 x double> %vec0.bc, <4 x double> addrspace(1)* %out
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%vec1.bc = bitcast <4 x i64> <i64 7, i64 7, i64 7, i64 9> to <4 x double>
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store volatile <4 x double> %vec1.bc, <4 x double> addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}store_bitcast_constant_v8i32_to_v16i16:
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; GCN: buffer_store_dwordx4
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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; GCN-NOT: v_mov_b32
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; GCN: buffer_store_dwordx4
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define void @store_bitcast_constant_v8i32_to_v16i16(<8 x float> addrspace(1)* %out, <16 x i16> %vec) {
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%vec0.bc = bitcast <16 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 8> to <8 x float>
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store volatile <8 x float> %vec0.bc, <8 x float> addrspace(1)* %out
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%vec1.bc = bitcast <16 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 9> to <8 x float>
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store volatile <8 x float> %vec1.bc, <8 x float> addrspace(1)* %out
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ret void
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}
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