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d019e8638a
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292982 91177308-0d34-0410-b5e6-96231b3b80d8
54 lines
1.5 KiB
LLVM
54 lines
1.5 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}rotr_i32:
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; R600: BIT_ALIGN_INT
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; SI: v_alignbit_b32
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define void @rotr_i32(i32 addrspace(1)* %in, i32 %x, i32 %y) {
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entry:
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%tmp0 = sub i32 32, %y
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%tmp1 = shl i32 %x, %tmp0
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%tmp2 = lshr i32 %x, %y
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%tmp3 = or i32 %tmp1, %tmp2
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store i32 %tmp3, i32 addrspace(1)* %in
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ret void
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}
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; FUNC-LABEL: {{^}}rotr_v2i32:
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; R600: BIT_ALIGN_INT
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; R600: BIT_ALIGN_INT
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; SI: v_alignbit_b32
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; SI: v_alignbit_b32
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define void @rotr_v2i32(<2 x i32> addrspace(1)* %in, <2 x i32> %x, <2 x i32> %y) {
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entry:
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%tmp0 = sub <2 x i32> <i32 32, i32 32>, %y
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%tmp1 = shl <2 x i32> %x, %tmp0
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%tmp2 = lshr <2 x i32> %x, %y
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%tmp3 = or <2 x i32> %tmp1, %tmp2
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store <2 x i32> %tmp3, <2 x i32> addrspace(1)* %in
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ret void
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}
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; FUNC-LABEL: {{^}}rotr_v4i32:
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; R600: BIT_ALIGN_INT
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; R600: BIT_ALIGN_INT
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; R600: BIT_ALIGN_INT
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; R600: BIT_ALIGN_INT
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; SI: v_alignbit_b32
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; SI: v_alignbit_b32
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; SI: v_alignbit_b32
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; SI: v_alignbit_b32
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define void @rotr_v4i32(<4 x i32> addrspace(1)* %in, <4 x i32> %x, <4 x i32> %y) {
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entry:
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%tmp0 = sub <4 x i32> <i32 32, i32 32, i32 32, i32 32>, %y
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%tmp1 = shl <4 x i32> %x, %tmp0
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%tmp2 = lshr <4 x i32> %x, %y
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%tmp3 = or <4 x i32> %tmp1, %tmp2
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store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %in
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ret void
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}
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