Tom Stellard b15bbca10c AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions ...

Summary:
Flat instruction can return out of order, so we need always need to wait
for all the outstanding flat operations.

Reviewers: tony-tye, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, llvm-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D25998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285479 91177308-0d34-0410-b5e6-96231b3b80d8

2016-10-28 23:53:48 +00:00

..

AArch64

Add AArch64 unit tests

2016-10-12 09:00:44 +00:00

AMDGPU

AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions

2016-10-28 23:53:48 +00:00

ARM

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

Generic

MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing it

2016-08-24 22:34:06 +00:00

Hexagon

[MIRParser] Parse lane masks for register live-ins

2016-10-12 21:06:45 +00:00

Lanai

MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it

2016-08-25 01:27:13 +00:00

Mips

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

NVPTX

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

PowerPC

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

X86

MIRParser: Rewrite register info initialization; mostly NFC

2016-10-11 03:13:01 +00:00