Ulrich Weigand b12a0a51d5 [SystemZ] Fix encoding of MVCK and .insn ss ...

LLVM currently treats the first operand of MVCK as if it were a
regular base+index+displacement address.  However, it is in fact
a base+displacement combined with a length register field.

While the two might look syntactically similar, there are two
semantic differences:
- %r0 is a valid length register, even though it cannot be used
  as an index register.
- In an expression with just a single register like 0(%rX), the
  register is treated as base with normal addresses, while it is
  treated as the length register (with an empty base) for MVCK.

Fixed by adding a new operand parser class BDRAddr and reworking
the assembler parser to distinguish between address + length
register operands and regular addresses.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285574 91177308-0d34-0410-b5e6-96231b3b80d8

2016-10-31 14:21:36 +00:00

..

CMakeLists.txt

[CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.

2013-11-28 17:04:04 +00:00

LLVMBuild.txt

Update library dependencies.

2014-07-24 02:10:42 +00:00

SystemZDisassembler.cpp

[SystemZ] Fix encoding of MVCK and .insn ss

2016-10-31 14:21:36 +00:00